forked from OSchip/llvm-project
[InstCombine][SSE] Added DemandedBits tests for MOVMSK instructions
MOVMSK zeros the upper bits of the gpr - we should be able to use this. llvm-svn: 267686
This commit is contained in:
Simon Pilgrim
parent
22a95121b9
commit
d2ea708739
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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;
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; DemandedBits - MOVMSK zeros the upper bits of the result.
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; TODO - we can get the and for free
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;
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define i32 @test_upper_x86_sse_movmsk_ps(<4 x float> %a0) {
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; CHECK-LABEL: @test_upper_x86_sse_movmsk_ps(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 15
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
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%2 = and i32 %1, 15
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ret i32 %2
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}
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define i32 @test_upper_x86_sse2_movmsk_pd(<2 x double> %a0) {
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; CHECK-LABEL: @test_upper_x86_sse2_movmsk_pd(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 3
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
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%2 = and i32 %1, 3
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ret i32 %2
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}
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define i32 @test_upper_x86_sse2_pmovmskb_128(<16 x i8> %a0) {
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; CHECK-LABEL: @test_upper_x86_sse2_pmovmskb_128(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 65535
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0)
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%2 = and i32 %1, 65535
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ret i32 %2
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}
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define i32 @test_upper_x86_avx_movmsk_ps_256(<8 x float> %a0) {
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; CHECK-LABEL: @test_upper_x86_avx_movmsk_ps_256(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 255
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
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%2 = and i32 %1, 255
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ret i32 %2
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}
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define i32 @test_upper_x86_avx_movmsk_pd_256(<4 x double> %a0) {
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; CHECK-LABEL: @test_upper_x86_avx_movmsk_pd_256(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 15
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
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%2 = and i32 %1, 15
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ret i32 %2
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}
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; llvm.x86.avx2.pmovmskb uses the whole of the 32-bit register.
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;
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; DemandedBits - If we don't use the lower bits then we just return zero.
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; TODO - just return zero
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;
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define i32 @test_lower_x86_sse_movmsk_ps(<4 x float> %a0) {
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; CHECK-LABEL: @test_lower_x86_sse_movmsk_ps(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -16
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
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%2 = and i32 %1, -16
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ret i32 %2
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}
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define i32 @test_lower_x86_sse2_movmsk_pd(<2 x double> %a0) {
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; CHECK-LABEL: @test_lower_x86_sse2_movmsk_pd(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -4
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
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%2 = and i32 %1, -4
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ret i32 %2
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}
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define i32 @test_lower_x86_sse2_pmovmskb_128(<16 x i8> %a0) {
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; CHECK-LABEL: @test_lower_x86_sse2_pmovmskb_128(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -65536
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0)
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%2 = and i32 %1, -65536
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ret i32 %2
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}
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define i32 @test_lower_x86_avx_movmsk_ps_256(<8 x float> %a0) {
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; CHECK-LABEL: @test_lower_x86_avx_movmsk_ps_256(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -256
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
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%2 = and i32 %1, -256
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ret i32 %2
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}
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define i32 @test_lower_x86_avx_movmsk_pd_256(<4 x double> %a0) {
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; CHECK-LABEL: @test_lower_x86_avx_movmsk_pd_256(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -16
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
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%2 = and i32 %1, -16
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ret i32 %2
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}
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; llvm.x86.avx2.pmovmskb uses the whole of the 32-bit register.
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declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>)
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declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>)
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declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>)
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declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
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declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>)
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declare i32 @llvm.x86.avx2.pmovmskb(<32 x i8>)
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