forked from OSchip/llvm-project
[X86] Support auto-detect for tigerlake and alderlake
Differential Revision: https://reviews.llvm.org/D107245
This commit is contained in:
parent
97c6ef4ea6
commit
d268c20070
|
@ -422,6 +422,22 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
|
|||
*Subtype = INTEL_COREI7_ICELAKE_CLIENT;
|
||||
break;
|
||||
|
||||
// Tigerlake:
|
||||
case 0x8c:
|
||||
case 0x8d:
|
||||
CPU = "tigerlake";
|
||||
*Type = INTEL_COREI7;
|
||||
*Subtype = INTEL_COREI7_TIGERLAKE;
|
||||
break;
|
||||
|
||||
// Alderlake:
|
||||
case 0x97:
|
||||
case 0x9a:
|
||||
CPU = "alderlake";
|
||||
*Type = INTEL_COREI7;
|
||||
*Subtype = INTEL_COREI7_ALDERLAKE;
|
||||
break;
|
||||
|
||||
// Icelake Xeon:
|
||||
case 0x6a:
|
||||
case 0x6c:
|
||||
|
|
|
@ -772,6 +772,22 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
|
|||
*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
|
||||
break;
|
||||
|
||||
// Tigerlake:
|
||||
case 0x8c:
|
||||
case 0x8d:
|
||||
CPU = "tigerlake";
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_TIGERLAKE;
|
||||
break;
|
||||
|
||||
// Alderlake:
|
||||
case 0x97:
|
||||
case 0x9a:
|
||||
CPU = "alderlake";
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_ALDERLAKE;
|
||||
break;
|
||||
|
||||
// Icelake Xeon:
|
||||
case 0x6a:
|
||||
case 0x6c:
|
||||
|
|
Loading…
Reference in New Issue