forked from OSchip/llvm-project
[llvm-objdump] Print memory operand addresses as regular comments
The patch reuses the common code to print memory operand addresses as instruction comments. This helps to align the comments and enables using target-specific comment markers when `evaluateMemoryOperandAddress()` is implemented for them. Differential Revision: https://reviews.llvm.org/D104861
This commit is contained in:
parent
e7fffa6f03
commit
d25e572421
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@ -3,13 +3,13 @@
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# RUN: %lld -lSystem %t.o -o %t
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# RUN: %lld -lSystem %t.o -o %t
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# CHECK: leaq {{.*}} # 0x100000000
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# CHECK: leaq {{.*}} ## 0x100000000
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# CHECK-NEXT: leaq {{.*}} # 0x100000000
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# CHECK-NEXT: leaq {{.*}} ## 0x100000000
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# RUN: %lld -dylib %t.o -o %t.dylib
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# RUN: %lld -dylib %t.o -o %t.dylib
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# RUN: llvm-objdump -d --no-show-raw-insn --rebase --section-headers %t.dylib | FileCheck %s --check-prefix=DYLIB-CHECK
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# RUN: llvm-objdump -d --no-show-raw-insn --rebase --section-headers %t.dylib | FileCheck %s --check-prefix=DYLIB-CHECK
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# DYLIB-CHECK: leaq {{.*}} # 0x0
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# DYLIB-CHECK: leaq {{.*}} ## 0x0
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# DYLIB-CHECK-NEXT: leaq {{.*}} # 0x0
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# DYLIB-CHECK-NEXT: leaq {{.*}} ## 0x0
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# DYLIB-LABEL: Sections:
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# DYLIB-LABEL: Sections:
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# DYLIB: __data 00000008 [[#%x,DATA:]] DATA
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# DYLIB: __data 00000008 [[#%x,DATA:]] DATA
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@ -10,8 +10,8 @@
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# CHECK: callq 0x[[#%x,FOO_OFF:]]
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# CHECK: callq 0x[[#%x,FOO_OFF:]]
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# CHECK-NEXT: callq 0x[[#%x,BAR_OFF:]]
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# CHECK-NEXT: callq 0x[[#%x,BAR_OFF:]]
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# CHECK: [[#%x,BAR_OFF]]: jmpq {{.*}} # 0x[[#%x,BAR_BIND:]]
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# CHECK: [[#%x,BAR_OFF]]: jmpq {{.*}} ## 0x[[#%x,BAR_BIND:]]
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# CHECK: [[#%x,FOO_OFF]]: jmpq {{.*}} # 0x[[#%x,FOO_BIND:]]
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# CHECK: [[#%x,FOO_OFF]]: jmpq {{.*}} ## 0x[[#%x,FOO_BIND:]]
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# CHECK-LABEL: Lazy bind table:
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# CHECK-LABEL: Lazy bind table:
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# CHECK-DAG: __DATA __la_symbol_ptr 0x[[#%x,FOO_BIND]] Foo _foo
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# CHECK-DAG: __DATA __la_symbol_ptr 0x[[#%x,FOO_BIND]] Foo _foo
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@ -18,7 +18,8 @@
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; NO-FMA: <_foo>:
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; NO-FMA: <_foo>:
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; NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
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; NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
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; NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
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; NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
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; NO-FMA-NEXT: vmovss [[#]](%rip), %xmm2
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; NO-FMA-NEXT: vmovss [[#]](%rip), %xmm2 ## xmm2 =
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; NO-FMA-NEXT: ## 0x
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; NO-FMA-NEXT: vsubss %xmm0, %xmm2, %xmm0
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; NO-FMA-NEXT: vsubss %xmm0, %xmm2, %xmm0
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; NO-FMA-NEXT: vmulss %xmm0, %xmm1, %xmm0
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; NO-FMA-NEXT: vmulss %xmm0, %xmm1, %xmm0
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; NO-FMA-NEXT: vaddss %xmm0, %xmm1, %xmm0
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; NO-FMA-NEXT: vaddss %xmm0, %xmm1, %xmm0
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@ -15,7 +15,7 @@
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# CHECK: Disassembly of section __TEXT,__text
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# CHECK: Disassembly of section __TEXT,__text
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# CHECK-LABEL: <_main>:
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# CHECK-LABEL: <_main>:
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# CHECK: leaq {{.*}}(%rip), %rsi # 0x[[ADDR]] <_goodbye_world>
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# CHECK: leaq {{.*}}(%rip), %rsi ## 0x[[ADDR]] <_goodbye_world>
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.section __TEXT,__text
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.section __TEXT,__text
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.global _main
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.global _main
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@ -14,7 +14,7 @@
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# RUN: llvm-objdump --bind --no-show-raw-insn -d -r %t/with-reexport | FileCheck %s
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# RUN: llvm-objdump --bind --no-show-raw-insn -d -r %t/with-reexport | FileCheck %s
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# CHECK: Disassembly of section __TEXT,__text:
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# CHECK: Disassembly of section __TEXT,__text:
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# CHECK: movq {{.*}} # 0x[[ADDR:[0-9a-f]+]]
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# CHECK: movq {{.*}} ## 0x[[ADDR:[0-9a-f]+]]
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# CHECK: Bind table:
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# CHECK: Bind table:
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# CHECK-DAG: __DATA_CONST __got 0x[[ADDR]] pointer 0 libSystem ___nan
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# CHECK-DAG: __DATA_CONST __got 0x[[ADDR]] pointer 0 libSystem ___nan
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@ -17,9 +17,9 @@
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# RUN: %lld -lSystem -L%t -ltlv %t/test.o -o %t/test
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# RUN: %lld -lSystem -L%t -ltlv %t/test.o -o %t/test
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# RUN: llvm-objdump --bind -d --no-show-raw-insn %t/test | FileCheck %s
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# RUN: llvm-objdump --bind -d --no-show-raw-insn %t/test | FileCheck %s
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# CHECK: movq [[#]](%rip), %rax # 0x[[#%x, FOO:]]
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# CHECK: movq [[#]](%rip), %rax ## 0x[[#%x, FOO:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%x, BAR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%x, BAR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%x, BAZ:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%x, BAZ:]]
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# CHECK-LABEL: Bind table:
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# CHECK-LABEL: Bind table:
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# CHECK-DAG: __DATA __thread_ptrs 0x{{0*}}[[#%x, FOO]] pointer 0 libtlv _foo
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# CHECK-DAG: __DATA __thread_ptrs 0x{{0*}}[[#%x, FOO]] pointer 0 libtlv _foo
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@ -34,13 +34,13 @@
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# HEADER: MH_HAS_TLV_DESCRIPTORS
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# HEADER: MH_HAS_TLV_DESCRIPTORS
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# REG: <_main>:
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# REG: <_main>:
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# REG-NEXT: leaq {{.*}}(%rip), %rax # {{.*}} <_foo>
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# REG-NEXT: leaq {{.*}}(%rip), %rax ## {{.*}} <_foo>
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# REG-NEXT: leaq {{.*}}(%rip), %rax # {{.*}} <_bar>
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# REG-NEXT: leaq {{.*}}(%rip), %rax ## {{.*}} <_bar>
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# REG-NEXT: retq
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# REG-NEXT: retq
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# TBSS: <_f>:
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# TBSS: <_f>:
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# TBSS-NEXT: leaq {{.*}}(%rip), %rax # {{.*}} <_baz>
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# TBSS-NEXT: leaq {{.*}}(%rip), %rax ## {{.*}} <_baz>
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# TBSS-NEXT: leaq {{.*}}(%rip), %rax # {{.*}} <_qux>
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# TBSS-NEXT: leaq {{.*}}(%rip), %rax ## {{.*}} <_qux>
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# TBSS-NEXT: retq
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# TBSS-NEXT: retq
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# REG-TLVP: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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# REG-TLVP: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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@ -19,12 +19,12 @@
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# CHECK-NEXT: {{[0-9a-f]+}} {{[0-9a-f ]*[1-9a-f]+[0-9a-f ]*}}
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# CHECK-NEXT: {{[0-9a-f]+}} {{[0-9a-f ]*[1-9a-f]+[0-9a-f ]*}}
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# CHECK: <_main>:
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# CHECK: <_main>:
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%X,WEAK_DY_GOT_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%X,WEAK_DY_GOT_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%X,WEAK_EXT_GOT_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%X,WEAK_EXT_GOT_ADDR:]]
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# CHECK-NEXT: leaq [[#]](%rip), %rax # 0x[[#%X,WEAK_INT_GOT_ADDR:]]
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# CHECK-NEXT: leaq [[#]](%rip), %rax ## 0x[[#%X,WEAK_INT_GOT_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%X,WEAK_TLV_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%X,WEAK_TLV_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax # 0x[[#%X,WEAK_DY_TLV_ADDR:]]
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# CHECK-NEXT: movq [[#]](%rip), %rax ## 0x[[#%X,WEAK_DY_TLV_ADDR:]]
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# CHECK-NEXT: leaq [[#]](%rip), %rax # 0x[[#%X,WEAK_INT_TLV_ADDR:]]
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# CHECK-NEXT: leaq [[#]](%rip), %rax ## 0x[[#%X,WEAK_INT_TLV_ADDR:]]
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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# CHECK-NEXT: callq 0x{{[0-9a-f]*}}
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@ -6,7 +6,7 @@
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# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
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# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
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# RUN: %lld -o %t %t.o
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# RUN: %lld -o %t %t.o
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# CHECK: leaq [[#]](%rip), %rax # {{.*}} <_foo>
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# CHECK: leaq [[#]](%rip), %rax ## {{.*}} <_foo>
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.globl _main, _foo
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.globl _main, _foo
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@ -12,18 +12,20 @@
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# CHECK-LABEL: Disassembly of section
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# CHECK-LABEL: Disassembly of section
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# CHECK: <_main>:
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# CHECK: <_main>:
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# CHECK-NEXT: movl {{.*}} # 0x[[#S]]
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# CHECK-NEXT: movl {{.*}} ## imm =
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# CHECK-NEXT: ## 0x[[#S]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: movl {{.*}} # 0x[[#S + 2]]
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# CHECK-NEXT: movl {{.*}} ## 0x[[#S + 2]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: movb {{.*}} # 0x[[#S]]
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# CHECK-NEXT: movb {{.*}} ## 0x[[#S]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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# CHECK: <__not_text>:
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# CHECK: <__not_text>:
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# CHECK-NEXT: movl {{.*}} # 0x[[#FOO + 8]]
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# CHECK-NEXT: movl {{.*}} ## imm =
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# CHECK-NEXT: ## 0x[[#FOO + 8]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: movl {{.*}} # 0x[[#FOO + 8 + 2]]
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# CHECK-NEXT: movl {{.*}} ## 0x[[#FOO + 8 + 2]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: movb {{.*}} # 0x[[#FOO + 8]]
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# CHECK-NEXT: movb {{.*}} ## 0x[[#FOO + 8]]
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# CHECK-NEXT: callq {{.*}}
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# CHECK-NEXT: callq {{.*}}
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.section __TEXT,__text
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.section __TEXT,__text
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@ -10,14 +10,14 @@
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# Instructions are expected to be aligned if the instruction in hex is not too long.
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# Instructions are expected to be aligned if the instruction in hex is not too long.
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# CHECK: 0: c3 |retq
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# CHECK: 0: c3 |retq
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# CHECK-NEXT: 1: 48 8b 05 56 34 12 00 |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
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# CHECK-NEXT: 1: 48 8b 05 56 34 12 00 |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
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# CHECK-NEXT: 8: 48 b8 54 55 55 55 55 55 55 55|movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
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# CHECK-NEXT: 8: 48 b8 54 55 55 55 55 55 55 55|movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
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# CHECK-NEXT: 12: 8f ea 00 12 4c 02 40 00 00 00 00 |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
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# CHECK-NEXT: 12: 8f ea 00 12 4c 02 40 00 00 00 00 |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
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# CHECK-NEXT: 1d: 8f ea 00 12 04 25 f0 1c f0 1c 00 00 00 00 |lwpins|$0x0, 0x1cf01cf0, %r15d
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# CHECK-NEXT: 1d: 8f ea 00 12 04 25 f0 1c f0 1c 00 00 00 00 |lwpins|$0x0, 0x1cf01cf0, %r15d
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# CHECK-NEXT: 2b: ff ff |<unknown>
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# CHECK-NEXT: 2b: ff ff |<unknown>
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# NORAW: 0: |retq
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# NORAW: 0: |retq
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# NORAW-NEXT: 1: |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
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# NORAW-NEXT: 1: |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
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# NORAW-NEXT: 8: |movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
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# NORAW-NEXT: 8: |movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
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# NORAW-NEXT: 12: |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
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# NORAW-NEXT: 12: |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
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# NORAW-NEXT: 1d: |lwpins|$0x0, 0x1cf01cf0, %r15d
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# NORAW-NEXT: 1d: |lwpins|$0x0, 0x1cf01cf0, %r15d
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// address (jump target or memory operand address) and print it on the
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// address (jump target or memory operand address) and print it on the
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// right of the instruction.
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// right of the instruction.
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if (Disassembled && MIA) {
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if (Disassembled && MIA) {
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// Branch targets are printed just after the instructions.
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llvm::raw_ostream *TargetOS = &FOS;
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uint64_t Target;
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uint64_t Target;
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bool PrintTarget =
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bool PrintTarget =
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MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target);
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MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target);
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Target = *MaybeTarget;
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Target = *MaybeTarget;
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PrintTarget = true;
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PrintTarget = true;
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// Do not print real address when symbolizing.
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// Do not print real address when symbolizing.
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if (!SymbolizeOperands)
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if (!SymbolizeOperands) {
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FOS << " # 0x" << Twine::utohexstr(Target);
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// Memory operand addresses are printed as comments.
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TargetOS = &CommentStream;
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*TargetOS << "0x" << Twine::utohexstr(Target);
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}
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}
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}
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if (PrintTarget) {
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if (PrintTarget) {
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// In a relocatable object, the target's section must reside in
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// In a relocatable object, the target's section must reside in
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if (Demangle)
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if (Demangle)
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TargetName = demangle(TargetName);
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TargetName = demangle(TargetName);
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FOS << " <";
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*TargetOS << " <";
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if (!Disp) {
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if (!Disp) {
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// Always Print the binary symbol precisely corresponding to
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// Always Print the binary symbol precisely corresponding to
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// the target address.
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// the target address.
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FOS << TargetName;
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*TargetOS << TargetName;
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} else if (!LabelAvailable) {
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} else if (!LabelAvailable) {
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// Always Print the binary symbol plus an offset if there's no
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// Always Print the binary symbol plus an offset if there's no
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// local label corresponding to the target address.
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// local label corresponding to the target address.
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FOS << TargetName << "+0x" << Twine::utohexstr(Disp);
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*TargetOS << TargetName << "+0x" << Twine::utohexstr(Disp);
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} else {
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} else {
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FOS << AllLabels[Target];
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*TargetOS << AllLabels[Target];
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}
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}
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FOS << ">";
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*TargetOS << ">";
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} else if (LabelAvailable) {
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} else if (LabelAvailable) {
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FOS << " <" << AllLabels[Target] << ">";
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*TargetOS << " <" << AllLabels[Target] << ">";
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}
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}
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// By convention, each record in the comment stream should be
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// terminated.
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if (TargetOS == &CommentStream)
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*TargetOS << "\n";
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}
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}
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}
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}
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}
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}
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