From d1dfdab9730326fe10d01da51eb4a943e0950bb0 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Thu, 25 Dec 2008 01:27:10 +0000
Subject: [PATCH] BT memory operands load from their address operand.

llvm-svn: 61424
---
 llvm/lib/Target/X86/X86Instr64bit.td | 2 +-
 llvm/lib/Target/X86/X86InstrInfo.td  | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td
index 6e284a63194c..065fd8dd2fa5 100644
--- a/llvm/lib/Target/X86/X86Instr64bit.td
+++ b/llvm/lib/Target/X86/X86Instr64bit.td
@@ -927,7 +927,7 @@ def BT64rr : RI<0xA3, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
                 (implicit EFLAGS)]>;
 def BT64mr : RI<0xA3, MRMSrcMem, (outs), (ins i64mem:$src1, GR64:$src2),
                "bt{q}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR64:$src2),
+               [(X86bt (loadi64 addr:$src1), GR64:$src2),
                 (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 4d27f31a18aa..4d22c3cfc291 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -2665,11 +2665,11 @@ def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2),
                 (implicit EFLAGS)]>;
 def BT16mr : I<0xA3, MRMSrcMem, (outs), (ins i16mem:$src1, GR16:$src2),
                "bt{w}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR16:$src2),
+               [(X86bt (loadi16 addr:$src1), GR16:$src2),
                 (implicit EFLAGS)]>, OpSize;
 def BT32mr : I<0xA3, MRMSrcMem, (outs), (ins i32mem:$src1, GR32:$src2),
                "bt{l}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR32:$src2),
+               [(X86bt (loadi32 addr:$src1), GR32:$src2),
                 (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]