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[NVPTX] Switch nvptx-use-infer-addrspace to true. 

Summary:
This switches us to use a different, more powerful algorithm for address
space inference.  I've tested this locally and it seems to work great.
Once we're more confident in it, we can remove the old pass altogether.

Reviewers: jingyue

Subscribers: llvm-commits, tra, jholewinski

Differential Revision: https://reviews.llvm.org/D23694

llvm-svn: 279317
This commit is contained in:
Justin Lebar 2016-08-19 20:46:45 +00:00
parent b03a71eea8
commit d13880a750
4 changed files with 7 additions and 7 deletions
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3
llvm/lib/Target/NVPTX/NVPTXInferAddressSpaces.cpp
View File

@ -87,9 +87,6 @@
// Finally, it fixes the undef in %y' so that
// %y' = phi float addrspace(3)* [ %input, %y2' ]
//
// TODO: This pass is experimental and not enabled by default. Users can turn it
// on by setting the -nvptx-use-infer-addrspace flag of llc. We plan to replace
// NVPTXNonFavorGenericAddrSpaces with this pass shortly.
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "nvptx-infer-addrspace"

2
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
View File

@ -51,7 +51,7 @@
using namespace llvm;
static cl::opt<bool> UseInferAddressSpaces(
"nvptx-use-infer-addrspace", cl::init(false), cl::Hidden,
"nvptx-use-infer-addrspace", cl::init(true), cl::Hidden,
cl::desc("Optimize address spaces using NVPTXInferAddressSpaces instead of "
"NVPTXFavorNonGenericAddrSpaces"));

3
llvm/test/CodeGen/NVPTX/access-non-generic.ll
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@ -1,6 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix PTX
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix PTX
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-use-infer-addrspace | FileCheck %s --check-prefix PTX
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-use-infer-addrspace=true | FileCheck %s --check-prefix PTX
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-use-infer-addrspace=false | FileCheck %s --check-prefix PTX
; RUN: opt < %s -S -nvptx-favor-non-generic -dce | FileCheck %s --check-prefix IR
; RUN: opt < %s -S -nvptx-infer-addrspace | FileCheck %s --check-prefix IR --check-prefix IR-WITH-LOOP

6
llvm/test/CodeGen/NVPTX/addrspacecast.ll
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@ -1,5 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -disable-nvptx-favor-non-generic | FileCheck %s -check-prefix=PTX32
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -disable-nvptx-favor-non-generic | FileCheck %s -check-prefix=PTX64
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -disable-nvptx-favor-non-generic \
; RUN: -nvptx-use-infer-addrspace=false | FileCheck %s -check-prefix=PTX32
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -disable-nvptx-favor-non-generic \
; RUN: -nvptx-use-infer-addrspace=false | FileCheck %s -check-prefix=PTX64
define i32 @conv1(i32 addrspace(1)* %ptr) {