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[clang][amdgpu] - Choose when to promote VarDecl to address space 4. 

There are instances where clang codegen creates stores to
address space 4 in ctors, which causes a crash in llc.
This store was being optimized out at opt levels > 0.

For example:

pragma omp declare target
static  const double log_smallx = log2(smallx);
pragma omp end declare target

This patch ensures that any global const that does not
have constant initialization stays in address space 1.

Note - a second patch is in the works where all global
constants are placed in address space 1 during
codegen and then the opt pass InferAdressSpaces
will promote to address space 4 where necessary.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D115661
This commit is contained in:
Ethan Stewart 2021-12-13 16:30:54 -06:00
parent 2de9338587
commit d1327f8a57
3 changed files with 11 additions and 9 deletions
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4
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -9362,7 +9362,9 @@ AMDGPUTargetCodeGenInfo::getGlobalVarAddressSpace(CodeGenModule &CGM,
if (AddrSpace != LangAS::Default) if (AddrSpace != LangAS::Default)
return AddrSpace; return AddrSpace;
if (CGM.isTypeConstant(D->getType(), false)) { // Only promote to address space 4 if VarDecl has constant initialization.
if (CGM.isTypeConstant(D->getType(), false) &&
D->hasConstantInitialization()) {
if (auto ConstAS = CGM.getTarget().getConstantAddressSpace()) if (auto ConstAS = CGM.getTarget().getConstantAddressSpace())
return ConstAS.getValue(); return ConstAS.getValue();
} }

12
clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
View File

@ -78,12 +78,12 @@ std::initializer_list<int> thread_local x = {1, 2, 3, 4};
// X86: @[[PARTLY_CONSTANT_SECOND:_ZGRN15partly_constant2ilE2_]] = internal global [2 x i32] zeroinitializer, align 4 // X86: @[[PARTLY_CONSTANT_SECOND:_ZGRN15partly_constant2ilE2_]] = internal global [2 x i32] zeroinitializer, align 4
// X86: @[[PARTLY_CONSTANT_THIRD:_ZGRN15partly_constant2ilE3_]] = internal constant [4 x i32] [i32 5, i32 6, i32 7, i32 8], align 4 // X86: @[[PARTLY_CONSTANT_THIRD:_ZGRN15partly_constant2ilE3_]] = internal constant [4 x i32] [i32 5, i32 6, i32 7, i32 8], align 4
// AMDGCN: @_ZN15partly_constant1kE ={{.*}} addrspace(1) global i32 0, align 4 // AMDGCN: @_ZN15partly_constant1kE ={{.*}} addrspace(1) global i32 0, align 4
// AMDGCN: @_ZN15partly_constant2ilE ={{.*}} addrspace(4) global {{.*}} null, align 8 // AMDGCN: @_ZN15partly_constant2ilE ={{.*}} addrspace(1) global {{.*}} null, align 8
// AMDGCN: @[[PARTLY_CONSTANT_OUTER:_ZGRN15partly_constant2ilE_]] = internal addrspace(4) global {{.*}} zeroinitializer, align 8 // AMDGCN: @[[PARTLY_CONSTANT_OUTER:_ZGRN15partly_constant2ilE_]] = internal addrspace(1) global {{.*}} zeroinitializer, align 8
// AMDGCN: @[[PARTLY_CONSTANT_INNER:_ZGRN15partly_constant2ilE0_]] = internal addrspace(4) global [3 x {{.*}}] zeroinitializer, align 8 // AMDGCN: @[[PARTLY_CONSTANT_INNER:_ZGRN15partly_constant2ilE0_]] = internal addrspace(1) global [3 x {{.*}}] zeroinitializer, align 8
// AMDGCN: @[[PARTLY_CONSTANT_FIRST:_ZGRN15partly_constant2ilE1_]] = internal addrspace(4) constant [3 x i32] [i32 1, i32 2, i32 3], align 4 // AMDGCN: @[[PARTLY_CONSTANT_FIRST:_ZGRN15partly_constant2ilE1_]] = internal addrspace(1) constant [3 x i32] [i32 1, i32 2, i32 3], align 4
// AMDGCN: @[[PARTLY_CONSTANT_SECOND:_ZGRN15partly_constant2ilE2_]] = internal addrspace(4) global [2 x i32] zeroinitializer, align 4 // AMDGCN: @[[PARTLY_CONSTANT_SECOND:_ZGRN15partly_constant2ilE2_]] = internal addrspace(1) global [2 x i32] zeroinitializer, align 4
// AMDGCN: @[[PARTLY_CONSTANT_THIRD:_ZGRN15partly_constant2ilE3_]] = internal addrspace(4) constant [4 x i32] [i32 5, i32 6, i32 7, i32 8], align 4 // AMDGCN: @[[PARTLY_CONSTANT_THIRD:_ZGRN15partly_constant2ilE3_]] = internal addrspace(1) constant [4 x i32] [i32 5, i32 6, i32 7, i32 8], align 4
// X86: @[[REFTMP1:.*]] = private constant [2 x i32] [i32 42, i32 43], align 4 // X86: @[[REFTMP1:.*]] = private constant [2 x i32] [i32 42, i32 43], align 4
// X86: @[[REFTMP2:.*]] = private constant [3 x %{{.*}}] [%{{.*}} { i32 1 }, %{{.*}} { i32 2 }, %{{.*}} { i32 3 }], align 4 // X86: @[[REFTMP2:.*]] = private constant [3 x %{{.*}}] [%{{.*}} { i32 1 }, %{{.*}} { i32 2 }, %{{.*}} { i32 3 }], align 4

4
clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
View File

@ -7,7 +7,7 @@ struct A {
static const int Foo = 123; static const int Foo = 123;
}; };
// X86: @_ZN1A3FooE ={{.*}} constant i32 123, align 4 // X86: @_ZN1A3FooE ={{.*}} constant i32 123, align 4
// AMD: @_ZN1A3FooE ={{.*}} addrspace(4) constant i32 123, align 4 // AMD: @_ZN1A3FooE ={{.*}} addrspace(1) constant i32 123, align 4
const int *p = &A::Foo; // emit available_externally const int *p = &A::Foo; // emit available_externally
const int A::Foo; // convert to full definition const int A::Foo; // convert to full definition
@ -37,7 +37,7 @@ struct Foo {
// CXX11X86: @_ZN3Foo21ConstexprStaticMemberE = available_externally constant i32 42, // CXX11X86: @_ZN3Foo21ConstexprStaticMemberE = available_externally constant i32 42,
// CXX17X86: @_ZN3Foo21ConstexprStaticMemberE = linkonce_odr constant i32 42, // CXX17X86: @_ZN3Foo21ConstexprStaticMemberE = linkonce_odr constant i32 42,
// CXX11AMD: @_ZN3Foo21ConstexprStaticMemberE = available_externally addrspace(4) constant i32 42, // CXX11AMD: @_ZN3Foo21ConstexprStaticMemberE = available_externally addrspace(4) constant i32 42,
// CXX17AMD: @_ZN3Foo21ConstexprStaticMemberE = linkonce_odr addrspace(4) constant i32 42, // CXX17AMD: @_ZN3Foo21ConstexprStaticMemberE = linkonce_odr addrspace(4) constant i32 42, comdat, align 4
static constexpr int ConstexprStaticMember = 42; static constexpr int ConstexprStaticMember = 42;
// X86: @_ZN3Foo17ConstStaticMemberE = available_externally constant i32 43, // X86: @_ZN3Foo17ConstStaticMemberE = available_externally constant i32 43,
// AMD: @_ZN3Foo17ConstStaticMemberE = available_externally addrspace(4) constant i32 43, // AMD: @_ZN3Foo17ConstStaticMemberE = available_externally addrspace(4) constant i32 43,