forked from OSchip/llvm-project
[X86][SSE] Add further test cases showing failure to compute sign bits through PACKSS
Suggested in D37680 Note: had to drop AVX512VL tests as there is an infinite loop in the new tests that needs further investigation (not relevant to D37680). llvm-svn: 312910
This commit is contained in:
Simon Pilgrim
parent
3ddffced43
commit
d0ff65b50e
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@ -4,7 +4,394 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512VL
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;
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; General cases - packing of vector comparison to legal vector result types
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;
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define <16 x i8> @vselect_packss_v16i16(<16 x i16> %a0, <16 x i16> %a1, <16 x i8> %a2, <16 x i8> %a3) {
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; SSE-LABEL: vselect_packss_v16i16:
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; SSE: # BB#0:
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; SSE-NEXT: pcmpeqw %xmm3, %xmm1
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; SSE-NEXT: pcmpeqw %xmm2, %xmm0
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; SSE-NEXT: packsswb %xmm1, %xmm0
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; SSE-NEXT: pand %xmm0, %xmm4
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; SSE-NEXT: pandn %xmm5, %xmm0
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; SSE-NEXT: por %xmm4, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: vselect_packss_v16i16:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
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; AVX1-NEXT: vpcmpeqw %xmm4, %xmm5, %xmm4
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; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm4, %xmm0, %xmm0
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; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm1
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; AVX1-NEXT: vpandn %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: vselect_packss_v16i16:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm1
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; AVX2-NEXT: vpandn %xmm3, %xmm0, %xmm0
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: vselect_packss_v16i16:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
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; AVX512-NEXT: vpmovsxwd %ymm0, %zmm0
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; AVX512-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512-NEXT: vpand %xmm2, %xmm0, %xmm1
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; AVX512-NEXT: vpandn %xmm3, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%1 = icmp eq <16 x i16> %a0, %a1
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%2 = sext <16 x i1> %1 to <16 x i8>
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%3 = and <16 x i8> %2, %a2
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%4 = xor <16 x i8> %2, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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%5 = and <16 x i8> %4, %a3
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%6 = or <16 x i8> %3, %5
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ret <16 x i8> %6
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}
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define <16 x i8> @vselect_packss_v16i32(<16 x i32> %a0, <16 x i32> %a1, <16 x i8> %a2, <16 x i8> %a3) {
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; SSE-LABEL: vselect_packss_v16i32:
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; SSE: # BB#0:
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; SSE-NEXT: pcmpeqd %xmm7, %xmm3
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; SSE-NEXT: pcmpeqd %xmm6, %xmm2
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; SSE-NEXT: packsswb %xmm3, %xmm2
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; SSE-NEXT: pcmpeqd %xmm5, %xmm1
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; SSE-NEXT: pcmpeqd %xmm4, %xmm0
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; SSE-NEXT: packsswb %xmm1, %xmm0
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; SSE-NEXT: packsswb %xmm2, %xmm0
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm1
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; SSE-NEXT: pand %xmm0, %xmm1
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; SSE-NEXT: pandn {{[0-9]+}}(%rsp), %xmm0
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; SSE-NEXT: por %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: vselect_packss_v16i32:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm6
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm7
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; AVX1-NEXT: vpcmpeqd %xmm6, %xmm7, %xmm6
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; AVX1-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1
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; AVX1-NEXT: vpacksswb %xmm6, %xmm1, %xmm1
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; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6
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; AVX1-NEXT: vpcmpeqd %xmm3, %xmm6, %xmm3
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; AVX1-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm1
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; AVX1-NEXT: vpandn %xmm5, %xmm0, %xmm0
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; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: vselect_packss_v16i32:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1
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; AVX2-NEXT: vpcmpeqd %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpand %xmm4, %xmm0, %xmm1
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; AVX2-NEXT: vpandn %xmm5, %xmm0, %xmm0
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: vselect_packss_v16i32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpcmpeqd %zmm1, %zmm0, %k1
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; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
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; AVX512-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512-NEXT: vpand %xmm2, %xmm0, %xmm1
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; AVX512-NEXT: vpandn %xmm3, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%1 = icmp eq <16 x i32> %a0, %a1
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%2 = sext <16 x i1> %1 to <16 x i8>
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%3 = and <16 x i8> %2, %a2
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%4 = xor <16 x i8> %2, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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%5 = and <16 x i8> %4, %a3
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%6 = or <16 x i8> %3, %5
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ret <16 x i8> %6
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}
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define <16 x i8> @vselect_packss_v16i64(<16 x i64> %a0, <16 x i64> %a1, <16 x i8> %a2, <16 x i8> %a3) {
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; SSE2-LABEL: vselect_packss_v16i64:
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; SSE2: # BB#0:
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm7
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; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[1,0,3,2]
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; SSE2-NEXT: pand %xmm7, %xmm8
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm6
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; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[1,0,3,2]
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; SSE2-NEXT: pand %xmm6, %xmm7
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; SSE2-NEXT: packsswb %xmm8, %xmm7
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm5
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; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[1,0,3,2]
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; SSE2-NEXT: pand %xmm5, %xmm6
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm4
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; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,0,3,2]
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; SSE2-NEXT: pand %xmm4, %xmm5
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; SSE2-NEXT: packsswb %xmm6, %xmm5
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; SSE2-NEXT: packsswb %xmm7, %xmm5
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm3
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,0,3,2]
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; SSE2-NEXT: pand %xmm3, %xmm4
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,0,3,2]
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; SSE2-NEXT: pand %xmm2, %xmm3
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; SSE2-NEXT: packsswb %xmm4, %xmm3
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,0,3,2]
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; SSE2-NEXT: pand %xmm1, %xmm2
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; SSE2-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
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; SSE2-NEXT: pand %xmm0, %xmm1
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; SSE2-NEXT: packsswb %xmm2, %xmm1
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; SSE2-NEXT: packsswb %xmm3, %xmm1
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; SSE2-NEXT: packsswb %xmm5, %xmm1
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; SSE2-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm0
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; SSE2-NEXT: pand %xmm1, %xmm0
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; SSE2-NEXT: pandn {{[0-9]+}}(%rsp), %xmm1
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE42-LABEL: vselect_packss_v16i64:
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; SSE42: # BB#0:
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm7
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm6
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; SSE42-NEXT: packsswb %xmm7, %xmm6
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm5
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm4
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; SSE42-NEXT: packsswb %xmm5, %xmm4
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; SSE42-NEXT: packsswb %xmm6, %xmm4
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm3
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm2
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; SSE42-NEXT: packsswb %xmm3, %xmm2
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm1
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; SSE42-NEXT: pcmpeqq {{[0-9]+}}(%rsp), %xmm0
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; SSE42-NEXT: packsswb %xmm1, %xmm0
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; SSE42-NEXT: packsswb %xmm2, %xmm0
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; SSE42-NEXT: packsswb %xmm4, %xmm0
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; SSE42-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm1
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; SSE42-NEXT: pand %xmm0, %xmm1
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; SSE42-NEXT: pandn {{[0-9]+}}(%rsp), %xmm0
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; SSE42-NEXT: por %xmm1, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX1-LABEL: vselect_packss_v16i64:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm8
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; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm9
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; AVX1-NEXT: vpcmpeqq %xmm8, %xmm9, %xmm8
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; AVX1-NEXT: vpcmpeqq %xmm7, %xmm3, %xmm3
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; AVX1-NEXT: vpacksswb %xmm8, %xmm3, %xmm8
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; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm7
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; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
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; AVX1-NEXT: vpcmpeqq %xmm7, %xmm3, %xmm3
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; AVX1-NEXT: vpcmpeqq %xmm6, %xmm2, %xmm2
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; AVX1-NEXT: vpacksswb %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vpacksswb %xmm8, %xmm2, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm6
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; AVX1-NEXT: vpcmpeqq %xmm3, %xmm6, %xmm3
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; AVX1-NEXT: vpcmpeqq %xmm5, %xmm1, %xmm1
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; AVX1-NEXT: vpacksswb %xmm3, %xmm1, %xmm1
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; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
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; AVX1-NEXT: vpcmpeqq %xmm3, %xmm5, %xmm3
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; AVX1-NEXT: vpcmpeqq %xmm4, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpand {{[0-9]+}}(%rsp), %xmm0, %xmm1
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; AVX1-NEXT: vpandn {{[0-9]+}}(%rsp), %xmm0, %xmm0
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; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: vselect_packss_v16i64:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpcmpeqq %ymm7, %ymm3, %ymm3
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; AVX2-NEXT: vpcmpeqq %ymm6, %ymm2, %ymm2
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; AVX2-NEXT: vpacksswb %ymm3, %ymm2, %ymm2
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; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,1,3]
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; AVX2-NEXT: vpcmpeqq %ymm5, %ymm1, %ymm1
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; AVX2-NEXT: vpcmpeqq %ymm4, %ymm0, %ymm0
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; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
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; AVX2-NEXT: vpacksswb %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpand {{[0-9]+}}(%rsp), %xmm0, %xmm1
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; AVX2-NEXT: vpandn {{[0-9]+}}(%rsp), %xmm0, %xmm0
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: vselect_packss_v16i64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vextracti32x4 $3, %zmm2, %xmm6
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; AVX512-NEXT: vpextrq $1, %xmm6, %rcx
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; AVX512-NEXT: vextracti32x4 $3, %zmm0, %xmm7
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; AVX512-NEXT: vpextrq $1, %xmm7, %rdx
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; AVX512-NEXT: xorl %eax, %eax
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; AVX512-NEXT: cmpq %rcx, %rdx
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; AVX512-NEXT: movq $-1, %rcx
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; AVX512-NEXT: movl $0, %edx
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; AVX512-NEXT: cmoveq %rcx, %rdx
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; AVX512-NEXT: vmovq %rdx, %xmm8
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; AVX512-NEXT: vmovq %xmm6, %rdx
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; AVX512-NEXT: vmovq %xmm7, %rsi
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; AVX512-NEXT: cmpq %rdx, %rsi
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; AVX512-NEXT: movl $0, %edx
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; AVX512-NEXT: cmoveq %rcx, %rdx
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; AVX512-NEXT: vmovq %rdx, %xmm6
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm8 = xmm6[0],xmm8[0]
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; AVX512-NEXT: vextracti32x4 $2, %zmm2, %xmm7
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; AVX512-NEXT: vpextrq $1, %xmm7, %rdx
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; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm6
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; AVX512-NEXT: vpextrq $1, %xmm6, %rsi
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; AVX512-NEXT: cmpq %rdx, %rsi
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; AVX512-NEXT: movl $0, %edx
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; AVX512-NEXT: cmoveq %rcx, %rdx
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; AVX512-NEXT: vmovq %rdx, %xmm9
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; AVX512-NEXT: vmovq %xmm7, %rdx
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; AVX512-NEXT: vmovq %xmm6, %rsi
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; AVX512-NEXT: cmpq %rdx, %rsi
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; AVX512-NEXT: movl $0, %edx
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; AVX512-NEXT: cmoveq %rcx, %rdx
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; AVX512-NEXT: vmovq %rdx, %xmm6
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm9[0]
|
||||
; AVX512-NEXT: vinserti128 $1, %xmm8, %ymm6, %ymm8
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm2, %xmm7
|
||||
; AVX512-NEXT: vpextrq $1, %xmm7, %rdx
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm6
|
||||
; AVX512-NEXT: vpextrq $1, %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm9
|
||||
; AVX512-NEXT: vmovq %xmm7, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm6
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm9[0]
|
||||
; AVX512-NEXT: vpextrq $1, %xmm2, %rdx
|
||||
; AVX512-NEXT: vpextrq $1, %xmm0, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm7
|
||||
; AVX512-NEXT: vmovq %xmm2, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm0, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm0
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm7[0]
|
||||
; AVX512-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vinserti64x4 $1, %ymm8, %zmm0, %zmm0
|
||||
; AVX512-NEXT: vpmovqd %zmm0, %ymm8
|
||||
; AVX512-NEXT: vextracti32x4 $3, %zmm3, %xmm2
|
||||
; AVX512-NEXT: vpextrq $1, %xmm2, %rdx
|
||||
; AVX512-NEXT: vextracti32x4 $3, %zmm1, %xmm6
|
||||
; AVX512-NEXT: vpextrq $1, %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm7
|
||||
; AVX512-NEXT: vmovq %xmm2, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm2
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm7[0]
|
||||
; AVX512-NEXT: vextracti32x4 $2, %zmm3, %xmm6
|
||||
; AVX512-NEXT: vpextrq $1, %xmm6, %rdx
|
||||
; AVX512-NEXT: vextracti32x4 $2, %zmm1, %xmm7
|
||||
; AVX512-NEXT: vpextrq $1, %xmm7, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm0
|
||||
; AVX512-NEXT: vmovq %xmm6, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm7, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm6
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm6[0],xmm0[0]
|
||||
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm3, %xmm0
|
||||
; AVX512-NEXT: vpextrq $1, %xmm0, %rdx
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm6
|
||||
; AVX512-NEXT: vpextrq $1, %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm7
|
||||
; AVX512-NEXT: vmovq %xmm0, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm6, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm0
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm7[0]
|
||||
; AVX512-NEXT: vpextrq $1, %xmm3, %rdx
|
||||
; AVX512-NEXT: vpextrq $1, %xmm1, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: movl $0, %edx
|
||||
; AVX512-NEXT: cmoveq %rcx, %rdx
|
||||
; AVX512-NEXT: vmovq %rdx, %xmm6
|
||||
; AVX512-NEXT: vmovq %xmm3, %rdx
|
||||
; AVX512-NEXT: vmovq %xmm1, %rsi
|
||||
; AVX512-NEXT: cmpq %rdx, %rsi
|
||||
; AVX512-NEXT: cmoveq %rcx, %rax
|
||||
; AVX512-NEXT: vmovq %rax, %xmm1
|
||||
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm6[0]
|
||||
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
|
||||
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm8, %zmm0
|
||||
; AVX512-NEXT: vpmovdb %zmm0, %xmm0
|
||||
; AVX512-NEXT: vpand %xmm4, %xmm0, %xmm1
|
||||
; AVX512-NEXT: vpandn %xmm5, %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%1 = icmp eq <16 x i64> %a0, %a1
|
||||
%2 = sext <16 x i1> %1 to <16 x i8>
|
||||
%3 = and <16 x i8> %2, %a2
|
||||
%4 = xor <16 x i8> %2, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
%5 = and <16 x i8> %4, %a3
|
||||
%6 = or <16 x i8> %3, %5
|
||||
ret <16 x i8> %6
|
||||
}
|
||||
|
||||
;
|
||||
; PACKSS case
|
||||
;
|
||||
|
||||
define <16 x i8> @vselect_packss(<16 x i16> %a0, <16 x i16> %a1, <16 x i8> %a2, <16 x i8> %a3) {
|
||||
; SSE-LABEL: vselect_packss:
|
||||
|
|
|
|||
Loading…
Reference in New Issue