forked from OSchip/llvm-project
X86Subtarget.h - remove unnecessary TargetMachine.h include. NFC.
By moving X86Subtarget::isPositionIndependent() into X86Subtarget.cpp we can remove the header dependency and move the few uses into source files.
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@ -40,6 +40,7 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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using namespace llvm;
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@ -44,6 +44,7 @@
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCSymbolELF.h"
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#include "llvm/MC/MCSymbolELF.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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using namespace llvm;
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@ -53,6 +53,7 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include <algorithm>
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#include <algorithm>
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#include <cassert>
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#include <cassert>
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#include <iterator>
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#include <iterator>
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@ -378,3 +378,7 @@ void X86Subtarget::getPostRAMutations(
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std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
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std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
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Mutations.push_back(createX86MacroFusionDAGMutation());
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Mutations.push_back(createX86MacroFusionDAGMutation());
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}
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}
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bool X86Subtarget::isPositionIndependent() const {
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return TM.isPositionIndependent();
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}
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@ -20,7 +20,6 @@
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#include "llvm/ADT/Triple.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/Target/TargetMachine.h"
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#include <climits>
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#include <climits>
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#include <memory>
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#include <memory>
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@ -35,6 +34,7 @@ class InstructionSelector;
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class LegalizerInfo;
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class LegalizerInfo;
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class RegisterBankInfo;
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class RegisterBankInfo;
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class StringRef;
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class StringRef;
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class TargetMachine;
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/// The X86 backend supports a number of different styles of PIC.
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/// The X86 backend supports a number of different styles of PIC.
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///
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///
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@ -841,7 +841,7 @@ public:
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return PICStyle == PICStyles::Style::StubPIC;
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return PICStyle == PICStyles::Style::StubPIC;
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}
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}
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bool isPositionIndependent() const { return TM.isPositionIndependent(); }
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bool isPositionIndependent() const;
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bool isCallingConvWin64(CallingConv::ID CC) const {
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bool isCallingConvWin64(CallingConv::ID CC) const {
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switch (CC) {
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switch (CC) {
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