forked from OSchip/llvm-project
Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment
for the port. Part of rdar://9643582 llvm-svn: 134085
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@ -1114,15 +1114,19 @@ MBlazeTargetLowering::getSingleConstraintMatchWeight(
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return weight;
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}
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/// getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"),
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/// return a list of registers that can be used to satisfy the constraint.
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/// This should only be used for C_RegisterClass constraints.
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/// Given a register class constraint, like 'r', if this corresponds directly
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/// to an LLVM register class, return a register of 0 and the register class
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/// pointer.
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std::pair<unsigned, const TargetRegisterClass*> MBlazeTargetLowering::
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getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
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if (Constraint.size() == 1) {
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switch (Constraint[0]) {
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case 'r':
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return std::make_pair(0U, MBlaze::GPRRegisterClass);
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// TODO: These can't possibly be right, but match what was in
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// getRegClassForInlineAsmConstraint.
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case 'd':
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case 'y':
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case 'f':
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if (VT == MVT::f32)
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return std::make_pair(0U, MBlaze::GPRRegisterClass);
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@ -1131,32 +1135,6 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
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return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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}
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/// Given a register class constraint, like 'r', if this corresponds directly
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/// to an LLVM register class, return a register of 0 and the register class
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/// pointer.
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std::vector<unsigned> MBlazeTargetLowering::
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getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
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if (Constraint.size() != 1)
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return std::vector<unsigned>();
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switch (Constraint[0]) {
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default : break;
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case 'r':
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// GCC MBlaze Constraint Letters
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case 'd':
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case 'y':
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case 'f':
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return make_vector<unsigned>(
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MBlaze::R3, MBlaze::R4, MBlaze::R5, MBlaze::R6,
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MBlaze::R7, MBlaze::R9, MBlaze::R10, MBlaze::R11,
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MBlaze::R12, MBlaze::R19, MBlaze::R20, MBlaze::R21,
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MBlaze::R22, MBlaze::R23, MBlaze::R24, MBlaze::R25,
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MBlaze::R26, MBlaze::R27, MBlaze::R28, MBlaze::R29,
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MBlaze::R30, MBlaze::R31, 0);
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}
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return std::vector<unsigned>();
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}
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bool MBlazeTargetLowering::
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isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
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// The MBlaze target isn't yet aware of offsets.
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@ -173,10 +173,6 @@ namespace llvm {
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getRegForInlineAsmConstraint(const std::string &Constraint,
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EVT VT) const;
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std::vector<unsigned>
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getRegClassForInlineAsmConstraint(const std::string &Constraint,
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EVT VT) const;
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virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
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/// isFPImmLegal - Returns true if the target can instruction select the
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