forked from OSchip/llvm-project
[WebAssembly] Rename several functions and types according to the new spec.
llvm-svn: 248644
This commit is contained in:
parent
6993ba4d3e
commit
d0bf981296
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@ -107,10 +107,10 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
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setStackPointerRegisterToSaveRestore(
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Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
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// Set up the register classes.
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addRegisterClass(MVT::i32, &WebAssembly::Int32RegClass);
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addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
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addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
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addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
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addRegisterClass(MVT::i32, &WebAssembly::I32RegClass);
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addRegisterClass(MVT::i64, &WebAssembly::I64RegClass);
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addRegisterClass(MVT::f32, &WebAssembly::F32RegClass);
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addRegisterClass(MVT::f64, &WebAssembly::F64RegClass);
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// Compute derived properties from the register classes.
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computeRegisterProperties(Subtarget->getRegisterInfo());
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@ -22,23 +22,23 @@ def : I<(outs), (ins i64imm:$amt1, i64imm:$amt2),
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} // isCodeGenOnly = 1
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multiclass CALL<WebAssemblyRegClass vt> {
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def CALL_#vt : I<(outs vt:$dst), (ins Int32:$callee, variable_ops),
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[(set vt:$dst, (WebAssemblycall1 Int32:$callee))]>;
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def CALL_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
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[(set vt:$dst, (WebAssemblycall1 I32:$callee))]>;
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}
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let Uses = [SP32, SP64], isCall = 1 in {
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defm : CALL<Int32>;
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defm : CALL<Int64>;
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defm : CALL<Float32>;
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defm : CALL<Float64>;
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defm : CALL<I32>;
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defm : CALL<I64>;
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defm : CALL<F32>;
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defm : CALL<F64>;
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def CALL_VOID : I<(outs), (ins Int32:$callee, variable_ops),
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[(WebAssemblycall0 Int32:$callee)]>;
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def CALL_VOID : I<(outs), (ins I32:$callee, variable_ops),
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[(WebAssemblycall0 I32:$callee)]>;
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} // Uses = [SP32,SP64], isCall = 1
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/*
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* TODO(jfb): Add the following.
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*
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* call_direct: call function directly
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* call: call function directly
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* call_indirect: call function indirectly
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* addressof: obtain a function pointer value for a given function
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*/
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@ -26,8 +26,8 @@
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*/
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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def BRIF : I<(outs), (ins bb_op:$dst, Int32:$a),
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[(brcond Int32:$a, bb:$dst)]>;
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def BRIF : I<(outs), (ins bb_op:$dst, I32:$a),
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[(brcond I32:$a, bb:$dst)]>;
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let isBarrier = 1 in {
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def BR : I<(outs), (ins bb_op:$dst),
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[(br bb:$dst)]>;
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@ -38,10 +38,10 @@ def BR : I<(outs), (ins bb_op:$dst),
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// jump tables, so in practice we don't ever use SWITCH_I64 in wasm32 mode
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// currently.
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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def SWITCH_I32 : I<(outs), (ins Int32:$index, variable_ops),
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[(WebAssemblyswitch Int32:$index)]>;
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def SWITCH_I64 : I<(outs), (ins Int64:$index, variable_ops),
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[(WebAssemblyswitch Int64:$index)]>;
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def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
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[(WebAssemblyswitch I32:$index)]>;
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def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
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[(WebAssemblyswitch I64:$index)]>;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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// Placemarkers to indicate the start of a block or loop scope.
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@ -52,9 +52,9 @@ multiclass RETURN<WebAssemblyRegClass vt> {
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def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)]>;
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}
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let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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defm : RETURN<Int32>;
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defm : RETURN<Int64>;
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defm : RETURN<Float32>;
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defm : RETURN<Float64>;
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defm : RETURN<I32>;
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defm : RETURN<I64>;
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defm : RETURN<F32>;
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defm : RETURN<F64>;
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def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
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} // isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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@ -16,32 +16,32 @@
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/*
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* TODO(jfb): Add the following.
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*
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* int32.wrap[int64]: wrap a 64-bit integer to a 32-bit integer
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* int32.trunc_signed[float32]: truncate a 32-bit float to a signed 32-bit integer
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* int32.trunc_signed[float64]: truncate a 64-bit float to a signed 32-bit integer
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* int32.trunc_unsigned[float32]: truncate a 32-bit float to an unsigned 32-bit integer
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* int32.trunc_unsigned[float64]: truncate a 64-bit float to an unsigned 32-bit integer
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* int32.reinterpret[float32]: reinterpret the bits of a 32-bit float as a 32-bit integer
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* int64.extend_signed[int32]: extend a signed 32-bit integer to a 64-bit integer
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* int64.extend_unsigned[int32]: extend an unsigned 32-bit integer to a 64-bit integer
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* int64.trunc_signed[float32]: truncate a 32-bit float to a signed 64-bit integer
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* int64.trunc_signed[float64]: truncate a 64-bit float to a signed 64-bit integer
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* int64.trunc_unsigned[float32]: truncate a 32-bit float to an unsigned 64-bit integer
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* int64.trunc_unsigned[float64]: truncate a 64-bit float to an unsigned 64-bit integer
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* int64.reinterpret[float64]: reinterpret the bits of a 64-bit float as a 64-bit integer
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* float32.demote[float64]: demote a 64-bit float to a 32-bit float
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* float32.cvt_signed[int32]: convert a signed 32-bit integer to a 32-bit float
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* float32.cvt_signed[int64]: convert a signed 64-bit integer to a 32-bit float
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* float32.cvt_unsigned[int32]: convert an unsigned 32-bit integer to a 32-bit float
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* float32.cvt_unsigned[int64]: convert an unsigned 64-bit integer to a 32-bit float
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* float32.reinterpret[int32]: reinterpret the bits of a 32-bit integer as a 32-bit float
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* float64.promote[float32]: promote a 32-bit float to a 64-bit float
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* float64.cvt_signed[int32]: convert a signed 32-bit integer to a 64-bit float
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* float64.cvt_signed[int64]: convert a signed 64-bit integer to a 64-bit float
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* float64.cvt_unsigned[int32]: convert an unsigned 32-bit integer to a 64-bit float
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* float64.cvt_unsigned[int64]: convert an unsigned 64-bit integer to a 64-bit float
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* float64.reinterpret[int64]: reinterpret the bits of a 64-bit integer as a 64-bit float
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* i32.wrap[i64]: wrap a 64-bit integer to a 32-bit integer
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* i32.trunc_s[f32]: truncate a 32-bit float to a signed 32-bit integer
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* i32.trunc_s[f64]: truncate a 64-bit float to a signed 32-bit integer
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* i32.trunc_u[f32]: truncate a 32-bit float to an unsigned 32-bit integer
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* i32.trunc_u[f64]: truncate a 64-bit float to an unsigned 32-bit integer
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* i32.reinterpret[f32]: reinterpret the bits of a 32-bit float as a 32-bit integer
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* i64.extend_s[i32]: extend a signed 32-bit integer to a 64-bit integer
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* i64.extend_u[i32]: extend an unsigned 32-bit integer to a 64-bit integer
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* i64.trunc_s[f32]: truncate a 32-bit float to a signed 64-bit integer
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* i64.trunc_s[f64]: truncate a 64-bit float to a signed 64-bit integer
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* i64.trunc_u[f32]: truncate a 32-bit float to an unsigned 64-bit integer
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* i64.trunc_u[f64]: truncate a 64-bit float to an unsigned 64-bit integer
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* i64.reinterpret[f64]: reinterpret the bits of a 64-bit float as a 64-bit integer
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* f32.demote[f64]: demote a 64-bit float to a 32-bit float
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* f32.convert_s[i32]: convert a signed 32-bit integer to a 32-bit float
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* f32.convert_s[i64]: convert a signed 64-bit integer to a 32-bit float
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* f32.convert_u[i32]: convert an unsigned 32-bit integer to a 32-bit float
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* f32.convert_u[i64]: convert an unsigned 64-bit integer to a 32-bit float
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* f32.reinterpret[i32]: reinterpret the bits of a 32-bit integer as a 32-bit float
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* f64.promote[f32]: promote a 32-bit float to a 64-bit float
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* f64.convert_s[i32]: convert a signed 32-bit integer to a 64-bit float
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* f64.convert_s[i64]: convert a signed 64-bit integer to a 64-bit float
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* f64.convert_u[i32]: convert an unsigned 32-bit integer to a 64-bit float
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* f64.convert_u[i64]: convert an unsigned 64-bit integer to a 64-bit float
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* f64.reinterpret[i64]: reinterpret the bits of a 64-bit integer as a 64-bit float
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*/
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def WRAP_I64_I32 : I<(outs Int32:$dst), (ins Int64:$src),
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[(set Int32:$dst, (trunc Int64:$src))]>;
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def WRAP_I64_I32 : I<(outs I32:$dst), (ins I64:$src),
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[(set I32:$dst, (trunc I64:$src))]>;
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@ -25,11 +25,11 @@ defm COPYSIGN : BinaryFP<fcopysign>;
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defm CEIL : UnaryFP<fceil>;
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defm FLOOR : UnaryFP<ffloor>;
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defm TRUNC : UnaryFP<ftrunc>;
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defm NEARESTINT : UnaryFP<fnearbyint>;
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defm NEAREST : UnaryFP<fnearbyint>;
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// WebAssembly doesn't expose inexact exceptions, so map frint to fnearbyint.
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def : Pat<(frint f32:$src), (NEARESTINT_F32 f32:$src)>;
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def : Pat<(frint f64:$src), (NEARESTINT_F64 f64:$src)>;
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def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
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def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>;
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defm EQ : ComparisonFP<SETOEQ>;
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defm NE : ComparisonFP<SETUNE>;
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@ -55,6 +55,6 @@ def : Pat<(setge f64:$lhs, f64:$rhs), (GE_F64 f64:$lhs, f64:$rhs)>;
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/*
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* TODO(jfb): Add the following for 32-bit and 64-bit.
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*
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* float32.min: minimum (binary operator); if either operand is NaN, returns NaN
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* float32.max: maximum (binary operator); if either operand is NaN, returns NaN
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* f32.min: minimum (binary operator); if either operand is NaN, returns NaN
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* f32.max: maximum (binary operator); if either operand is NaN, returns NaN
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*/
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@ -30,38 +30,38 @@ class I<dag oops, dag iops, list<dag> pattern, string cstr = "">
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// Unary and binary instructions, for the local types that WebAssembly supports.
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multiclass UnaryInt<SDNode node> {
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def _I32 : I<(outs Int32:$dst), (ins Int32:$src),
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[(set Int32:$dst, (node Int32:$src))]>;
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def _I64 : I<(outs Int64:$dst), (ins Int64:$src),
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[(set Int64:$dst, (node Int64:$src))]>;
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def _I32 : I<(outs I32:$dst), (ins I32:$src),
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[(set I32:$dst, (node I32:$src))]>;
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def _I64 : I<(outs I64:$dst), (ins I64:$src),
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[(set I64:$dst, (node I64:$src))]>;
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}
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multiclass BinaryInt<SDNode node> {
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def _I32 : I<(outs Int32:$dst), (ins Int32:$lhs, Int32:$rhs),
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[(set Int32:$dst, (node Int32:$lhs, Int32:$rhs))]>;
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def _I64 : I<(outs Int64:$dst), (ins Int64:$lhs, Int64:$rhs),
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[(set Int64:$dst, (node Int64:$lhs, Int64:$rhs))]>;
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def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs),
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[(set I32:$dst, (node I32:$lhs, I32:$rhs))]>;
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def _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs),
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[(set I64:$dst, (node I64:$lhs, I64:$rhs))]>;
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}
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multiclass UnaryFP<SDNode node> {
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def _F32 : I<(outs Float32:$dst), (ins Float32:$src),
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[(set Float32:$dst, (node Float32:$src))]>;
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def _F64 : I<(outs Float64:$dst), (ins Float64:$src),
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[(set Float64:$dst, (node Float64:$src))]>;
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def _F32 : I<(outs F32:$dst), (ins F32:$src),
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[(set F32:$dst, (node F32:$src))]>;
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def _F64 : I<(outs F64:$dst), (ins F64:$src),
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[(set F64:$dst, (node F64:$src))]>;
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}
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multiclass BinaryFP<SDNode node> {
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def _F32 : I<(outs Float32:$dst), (ins Float32:$lhs, Float32:$rhs),
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[(set Float32:$dst, (node Float32:$lhs, Float32:$rhs))]>;
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def _F64 : I<(outs Float64:$dst), (ins Float64:$lhs, Float64:$rhs),
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[(set Float64:$dst, (node Float64:$lhs, Float64:$rhs))]>;
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def _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs),
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[(set F32:$dst, (node F32:$lhs, F32:$rhs))]>;
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def _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs),
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[(set F64:$dst, (node F64:$lhs, F64:$rhs))]>;
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}
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multiclass ComparisonInt<CondCode cond> {
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def _I32 : I<(outs Int32:$dst), (ins Int32:$lhs, Int32:$rhs),
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[(set Int32:$dst, (setcc Int32:$lhs, Int32:$rhs, cond))]>;
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def _I64 : I<(outs Int32:$dst), (ins Int64:$lhs, Int64:$rhs),
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[(set Int32:$dst, (setcc Int64:$lhs, Int64:$rhs, cond))]>;
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def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs),
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[(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))]>;
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def _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs),
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[(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))]>;
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}
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multiclass ComparisonFP<CondCode cond> {
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def _F32 : I<(outs Int32:$dst), (ins Float32:$lhs, Float32:$rhs),
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[(set Int32:$dst, (setcc Float32:$lhs, Float32:$rhs, cond))]>;
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def _F64 : I<(outs Int32:$dst), (ins Float64:$lhs, Float64:$rhs),
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[(set Int32:$dst, (setcc Float64:$lhs, Float64:$rhs, cond))]>;
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def _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs),
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[(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))]>;
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def _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs),
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[(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))]>;
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}
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@ -87,26 +87,26 @@ multiclass ARGUMENT<WebAssemblyRegClass vt> {
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def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
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[(set vt:$res, (WebAssemblyargument timm:$argno))]>;
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}
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defm : ARGUMENT<Int32>;
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defm : ARGUMENT<Int64>;
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defm : ARGUMENT<Float32>;
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defm : ARGUMENT<Float64>;
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defm : ARGUMENT<I32>;
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defm : ARGUMENT<I64>;
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defm : ARGUMENT<F32>;
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defm : ARGUMENT<F64>;
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def Immediate_I32 : I<(outs Int32:$res), (ins i32imm:$imm),
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[(set Int32:$res, imm:$imm)]>;
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def Immediate_I64 : I<(outs Int64:$res), (ins i64imm:$imm),
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[(set Int64:$res, imm:$imm)]>;
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def Immediate_F32 : I<(outs Float32:$res), (ins f32imm:$imm),
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[(set Float32:$res, fpimm:$imm)]>;
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def Immediate_F64 : I<(outs Float64:$res), (ins f64imm:$imm),
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[(set Float64:$res, fpimm:$imm)]>;
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def Immediate_I32 : I<(outs I32:$res), (ins i32imm:$imm),
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[(set I32:$res, imm:$imm)]>;
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def Immediate_I64 : I<(outs I64:$res), (ins i64imm:$imm),
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[(set I64:$res, imm:$imm)]>;
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def Immediate_F32 : I<(outs F32:$res), (ins f32imm:$imm),
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[(set F32:$res, fpimm:$imm)]>;
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def Immediate_F64 : I<(outs F64:$res), (ins f64imm:$imm),
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[(set F64:$res, fpimm:$imm)]>;
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// Special types of immediates. FIXME: Hard-coded as 32-bit for now.
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def GLOBAL : I<(outs Int32:$dst), (ins global:$addr),
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[(set Int32:$dst, (WebAssemblywrapper tglobaladdr:$addr))]>;
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def JUMP_TABLE : I<(outs Int32:$dst), (ins tjumptable_op:$addr),
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[(set Int32:$dst, (WebAssemblywrapper tjumptable:$addr))]>;
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def GLOBAL : I<(outs I32:$dst), (ins global:$addr),
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[(set I32:$dst, (WebAssemblywrapper tglobaladdr:$addr))]>;
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def JUMP_TABLE : I<(outs I32:$dst), (ins tjumptable_op:$addr),
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[(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))]>;
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//===----------------------------------------------------------------------===//
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// Additional sets of instructions.
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@ -42,7 +42,7 @@ defm CTZ : UnaryInt<cttz>;
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defm POPCNT : UnaryInt<ctpop>;
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// Expand the "don't care" operations to supported operations.
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def : Pat<(ctlz_zero_undef Int32:$src), (CLZ_I32 Int32:$src)>;
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def : Pat<(ctlz_zero_undef Int64:$src), (CLZ_I64 Int64:$src)>;
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def : Pat<(cttz_zero_undef Int32:$src), (CTZ_I32 Int32:$src)>;
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def : Pat<(cttz_zero_undef Int64:$src), (CTZ_I64 Int64:$src)>;
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def : Pat<(ctlz_zero_undef I32:$src), (CLZ_I32 I32:$src)>;
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def : Pat<(ctlz_zero_undef I64:$src), (CLZ_I64 I64:$src)>;
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def : Pat<(cttz_zero_undef I32:$src), (CTZ_I32 I32:$src)>;
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def : Pat<(cttz_zero_undef I64:$src), (CTZ_I64 I64:$src)>;
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@ -30,71 +30,71 @@
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// types when loading, and truncate when storing.
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// Basic load.
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def LOAD_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (load Int32:$addr))]>;
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def LOAD_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (load Int32:$addr))]>;
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def LOAD_F32_ : I<(outs Float32:$dst), (ins Int32:$addr),
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[(set Float32:$dst, (load Int32:$addr))]>;
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def LOAD_F64_ : I<(outs Float64:$dst), (ins Int32:$addr),
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[(set Float64:$dst, (load Int32:$addr))]>;
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def LOAD_I32_ : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (load I32:$addr))]>;
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def LOAD_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (load I32:$addr))]>;
|
||||
def LOAD_F32_ : I<(outs F32:$dst), (ins I32:$addr),
|
||||
[(set F32:$dst, (load I32:$addr))]>;
|
||||
def LOAD_F64_ : I<(outs F64:$dst), (ins I32:$addr),
|
||||
[(set F64:$dst, (load I32:$addr))]>;
|
||||
|
||||
// Extending load.
|
||||
def LOAD_SX_I8_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
|
||||
[(set Int32:$dst, (sextloadi8 Int32:$addr))]>;
|
||||
def LOAD_ZX_I8_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
|
||||
[(set Int32:$dst, (zextloadi8 Int32:$addr))]>;
|
||||
def LOAD_SX_I16_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
|
||||
[(set Int32:$dst, (sextloadi16 Int32:$addr))]>;
|
||||
def LOAD_ZX_I16_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
|
||||
[(set Int32:$dst, (zextloadi16 Int32:$addr))]>;
|
||||
def LOAD_SX_I8_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (sextloadi8 Int32:$addr))]>;
|
||||
def LOAD_ZX_I8_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (zextloadi8 Int32:$addr))]>;
|
||||
def LOAD_SX_I16_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (sextloadi16 Int32:$addr))]>;
|
||||
def LOAD_ZX_I16_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (zextloadi16 Int32:$addr))]>;
|
||||
def LOAD_SX_I32_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (sextloadi32 Int32:$addr))]>;
|
||||
def LOAD_ZX_I32_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
|
||||
[(set Int64:$dst, (zextloadi32 Int32:$addr))]>;
|
||||
def LOAD_S_i8_I32_ : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (sextloadi8 I32:$addr))]>;
|
||||
def LOAD_U_i8_I32_ : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (zextloadi8 I32:$addr))]>;
|
||||
def LOAD_S_i16_I32_ : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (sextloadi16 I32:$addr))]>;
|
||||
def LOAD_U_i16_I32_ : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (zextloadi16 I32:$addr))]>;
|
||||
def LOAD_S_i8_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi8 I32:$addr))]>;
|
||||
def LOAD_U_i8_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi8 I32:$addr))]>;
|
||||
def LOAD_S_i16_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi16 I32:$addr))]>;
|
||||
def LOAD_U_i16_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi16 I32:$addr))]>;
|
||||
def LOAD_S_I32_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi32 I32:$addr))]>;
|
||||
def LOAD_U_I32_I64_ : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi32 I32:$addr))]>;
|
||||
|
||||
// "Don't care" extending load become zero-extending load.
|
||||
def : Pat<(i32 (extloadi8 Int32:$addr)), (LOAD_ZX_I8_I32_ $addr)>;
|
||||
def : Pat<(i32 (extloadi16 Int32:$addr)), (LOAD_ZX_I16_I32_ $addr)>;
|
||||
def : Pat<(i64 (extloadi8 Int32:$addr)), (LOAD_ZX_I8_I64_ $addr)>;
|
||||
def : Pat<(i64 (extloadi16 Int32:$addr)), (LOAD_ZX_I16_I64_ $addr)>;
|
||||
def : Pat<(i64 (extloadi32 Int32:$addr)), (LOAD_ZX_I32_I64_ $addr)>;
|
||||
def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD_U_i8_I32_ $addr)>;
|
||||
def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD_U_i16_I32_ $addr)>;
|
||||
def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD_U_i8_I64_ $addr)>;
|
||||
def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD_U_i16_I64_ $addr)>;
|
||||
def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD_U_I32_I64_ $addr)>;
|
||||
|
||||
// Basic store.
|
||||
// Note: WebAssembly inverts SelectionDAG's usual operand order.
|
||||
def STORE_I32_ : I<(outs), (ins Int32:$addr, Int32:$val),
|
||||
[(store Int32:$val, Int32:$addr)]>;
|
||||
def STORE_I64_ : I<(outs), (ins Int32:$addr, Int64:$val),
|
||||
[(store Int64:$val, Int32:$addr)]>;
|
||||
def STORE_F32_ : I<(outs), (ins Int32:$addr, Float32:$val),
|
||||
[(store Float32:$val, Int32:$addr)]>;
|
||||
def STORE_F64_ : I<(outs), (ins Int32:$addr, Float64:$val),
|
||||
[(store Float64:$val, Int32:$addr)]>;
|
||||
def STORE_I32_ : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(store i32:$val, I32:$addr)]>;
|
||||
def STORE_I64_ : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(store i64:$val, I32:$addr)]>;
|
||||
def STORE_F32_ : I<(outs), (ins I32:$addr, F32:$val),
|
||||
[(store f32:$val, I32:$addr)]>;
|
||||
def STORE_F64_ : I<(outs), (ins I32:$addr, F64:$val),
|
||||
[(store f64:$val, I32:$addr)]>;
|
||||
|
||||
// Truncating store.
|
||||
def STORE_I8_I32 : I<(outs), (ins Int32:$addr, Int32:$val),
|
||||
[(truncstorei8 Int32:$val, Int32:$addr)]>;
|
||||
def STORE_I16_I32 : I<(outs), (ins Int32:$addr, Int32:$val),
|
||||
[(truncstorei16 Int32:$val, Int32:$addr)]>;
|
||||
def STORE_I8_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
|
||||
[(truncstorei8 Int64:$val, Int32:$addr)]>;
|
||||
def STORE_I16_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
|
||||
[(truncstorei16 Int64:$val, Int32:$addr)]>;
|
||||
def STORE_I32_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
|
||||
[(truncstorei32 Int64:$val, Int32:$addr)]>;
|
||||
def STORE_i8_I32 : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(truncstorei8 I32:$val, I32:$addr)]>;
|
||||
def STORE_i16_I32 : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(truncstorei16 I32:$val, I32:$addr)]>;
|
||||
def STORE_i8_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei8 I64:$val, I32:$addr)]>;
|
||||
def STORE_i16_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei16 I64:$val, I32:$addr)]>;
|
||||
def STORE_I32_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei32 I64:$val, I32:$addr)]>;
|
||||
|
||||
// Page size.
|
||||
def page_size_I32 : I<(outs Int32:$dst), (ins),
|
||||
[(set Int32:$dst, (int_wasm_page_size))]>,
|
||||
def page_size_I32 : I<(outs I32:$dst), (ins),
|
||||
[(set I32:$dst, (int_wasm_page_size))]>,
|
||||
Requires<[HasAddr32]>;
|
||||
def page_size_I64 : I<(outs Int64:$dst), (ins),
|
||||
[(set Int64:$dst, (int_wasm_page_size))]>,
|
||||
def page_size_I64 : I<(outs I64:$dst), (ins),
|
||||
[(set I64:$dst, (int_wasm_page_size))]>,
|
||||
Requires<[HasAddr64]>;
|
||||
|
|
|
@ -48,7 +48,7 @@ foreach i = 0-4 in {
|
|||
// Register classes
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
def Int32 : WebAssemblyRegClass<[i32], 32, (add (sequence "I%u", 0, 4), SP32)>;
|
||||
def Int64 : WebAssemblyRegClass<[i64], 64, (add (sequence "L%u", 0, 4), SP64)>;
|
||||
def Float32 : WebAssemblyRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>;
|
||||
def Float64 : WebAssemblyRegClass<[f64], 64, (add (sequence "D%u", 0, 4))>;
|
||||
def I32 : WebAssemblyRegClass<[i32], 32, (add (sequence "I%u", 0, 4), SP32)>;
|
||||
def I64 : WebAssemblyRegClass<[i64], 64, (add (sequence "L%u", 0, 4), SP64)>;
|
||||
def F32 : WebAssemblyRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>;
|
||||
def F64 : WebAssemblyRegClass<[f64], 64, (add (sequence "D%u", 0, 4))>;
|
||||
|
|
|
@ -95,16 +95,16 @@ define float @trunc32(float %x) {
|
|||
ret float %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $nearestint32
|
||||
; CHECK: (setlocal @1 (nearestint @0))
|
||||
define float @nearestint32(float %x) {
|
||||
; CHECK-LABEL: (func $nearest32
|
||||
; CHECK: (setlocal @1 (nearest @0))
|
||||
define float @nearest32(float %x) {
|
||||
%a = call float @llvm.nearbyint.f32(float %x)
|
||||
ret float %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $nearestint32_via_rint
|
||||
; CHECK: (setlocal @1 (nearestint @0))
|
||||
define float @nearestint32_via_rint(float %x) {
|
||||
; CHECK-LABEL: (func $nearest32_via_rint
|
||||
; CHECK: (setlocal @1 (nearest @0))
|
||||
define float @nearest32_via_rint(float %x) {
|
||||
%a = call float @llvm.rint.f32(float %x)
|
||||
ret float %a
|
||||
}
|
||||
|
|
|
@ -95,16 +95,16 @@ define double @trunc64(double %x) {
|
|||
ret double %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $nearestint64
|
||||
; CHECK: (setlocal @1 (nearestint @0))
|
||||
define double @nearestint64(double %x) {
|
||||
; CHECK-LABEL: (func $nearest64
|
||||
; CHECK: (setlocal @1 (nearest @0))
|
||||
define double @nearest64(double %x) {
|
||||
%a = call double @llvm.nearbyint.f64(double %x)
|
||||
ret double %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $nearestint64_via_rint
|
||||
; CHECK: (setlocal @1 (nearestint @0))
|
||||
define double @nearestint64_via_rint(double %x) {
|
||||
; CHECK-LABEL: (func $nearest64_via_rint
|
||||
; CHECK: (setlocal @1 (nearest @0))
|
||||
define double @nearest64_via_rint(double %x) {
|
||||
%a = call double @llvm.rint.f64(double %x)
|
||||
ret double %a
|
||||
}
|
||||
|
|
|
@ -6,7 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
|||
target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: (func $sext_i8_i32
|
||||
; CHECK: (setlocal @1 (load_sx_i8_i32 @0))
|
||||
; CHECK: (setlocal @1 (load_s_i8_i32 @0))
|
||||
define i32 @sext_i8_i32(i8 *%p) {
|
||||
%v = load i8, i8* %p
|
||||
%e = sext i8 %v to i32
|
||||
|
@ -14,7 +14,7 @@ define i32 @sext_i8_i32(i8 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $zext_i8_i32
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i32 @0))
|
||||
; CHECK: (setlocal @1 (load_u_i8_i32 @0))
|
||||
define i32 @zext_i8_i32(i8 *%p) {
|
||||
%v = load i8, i8* %p
|
||||
%e = zext i8 %v to i32
|
||||
|
@ -22,7 +22,7 @@ define i32 @zext_i8_i32(i8 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $sext_i16_i32
|
||||
; CHECK: (setlocal @1 (load_sx_i16_i32 @0))
|
||||
; CHECK: (setlocal @1 (load_s_i16_i32 @0))
|
||||
define i32 @sext_i16_i32(i16 *%p) {
|
||||
%v = load i16, i16* %p
|
||||
%e = sext i16 %v to i32
|
||||
|
@ -30,7 +30,7 @@ define i32 @sext_i16_i32(i16 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $zext_i16_i32
|
||||
; CHECK: (setlocal @1 (load_zx_i16_i32 @0))
|
||||
; CHECK: (setlocal @1 (load_u_i16_i32 @0))
|
||||
define i32 @zext_i16_i32(i16 *%p) {
|
||||
%v = load i16, i16* %p
|
||||
%e = zext i16 %v to i32
|
||||
|
@ -38,7 +38,7 @@ define i32 @zext_i16_i32(i16 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $sext_i8_i64
|
||||
; CHECK: (setlocal @1 (load_sx_i8_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_s_i8_i64 @0))
|
||||
define i64 @sext_i8_i64(i8 *%p) {
|
||||
%v = load i8, i8* %p
|
||||
%e = sext i8 %v to i64
|
||||
|
@ -46,7 +46,7 @@ define i64 @sext_i8_i64(i8 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $zext_i8_i64
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_u_i8_i64 @0))
|
||||
define i64 @zext_i8_i64(i8 *%p) {
|
||||
%v = load i8, i8* %p
|
||||
%e = zext i8 %v to i64
|
||||
|
@ -54,7 +54,7 @@ define i64 @zext_i8_i64(i8 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $sext_i16_i64
|
||||
; CHECK: (setlocal @1 (load_sx_i16_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_s_i16_i64 @0))
|
||||
define i64 @sext_i16_i64(i16 *%p) {
|
||||
%v = load i16, i16* %p
|
||||
%e = sext i16 %v to i64
|
||||
|
@ -62,7 +62,7 @@ define i64 @sext_i16_i64(i16 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $zext_i16_i64
|
||||
; CHECK: (setlocal @1 (load_zx_i16_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_u_i16_i64 @0))
|
||||
define i64 @zext_i16_i64(i16 *%p) {
|
||||
%v = load i16, i16* %p
|
||||
%e = zext i16 %v to i64
|
||||
|
@ -70,7 +70,7 @@ define i64 @zext_i16_i64(i16 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $sext_i32_i64
|
||||
; CHECK: (setlocal @1 (load_sx_i32_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_s_i32_i64 @0))
|
||||
define i64 @sext_i32_i64(i32 *%p) {
|
||||
%v = load i32, i32* %p
|
||||
%e = sext i32 %v to i64
|
||||
|
@ -78,7 +78,7 @@ define i64 @sext_i32_i64(i32 *%p) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: (func $zext_i32_i64
|
||||
; CHECK: (setlocal @1 (load_zx_i32_i64 @0))
|
||||
; CHECK: (setlocal @1 (load_u_i32_i64 @0))
|
||||
define i64 @zext_i32_i64(i32 *%p) {
|
||||
%v = load i32, i32* %p
|
||||
%e = zext i32 %v to i64
|
||||
|
|
|
@ -5,43 +5,43 @@
|
|||
target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
||||
target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: (func $load_unsigned_i1_i32
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i32 @0))
|
||||
; CHECK-LABEL: (func $load_u_i1_i32
|
||||
; CHECK: (setlocal @1 (load_u_i8_i32 @0))
|
||||
; CHECK-NEXT: (return @1)
|
||||
define i32 @load_unsigned_i1_i32(i1* %p) {
|
||||
define i32 @load_u_i1_i32(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
%e = zext i1 %v to i32
|
||||
ret i32 %e
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $load_signed_i1_i32
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i32 @0))
|
||||
; CHECK-LABEL: (func $load_s_i1_i32
|
||||
; CHECK: (setlocal @1 (load_u_i8_i32 @0))
|
||||
; CHECK-NEXT: (setlocal @2 (immediate 31))
|
||||
; CHECK-NEXT: (setlocal @3 (shl @1 @2))
|
||||
; CHECK-NEXT: (setlocal @4 (shr_s @3 @2))
|
||||
; CHECK-NEXT: (return @4)
|
||||
define i32 @load_signed_i1_i32(i1* %p) {
|
||||
define i32 @load_s_i1_i32(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
%e = sext i1 %v to i32
|
||||
ret i32 %e
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $load_unsigned_i1_i64
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i64 @0))
|
||||
; CHECK-LABEL: (func $load_u_i1_i64
|
||||
; CHECK: (setlocal @1 (load_u_i8_i64 @0))
|
||||
; CHECK-NEXT: (return @1)
|
||||
define i64 @load_unsigned_i1_i64(i1* %p) {
|
||||
define i64 @load_u_i1_i64(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
%e = zext i1 %v to i64
|
||||
ret i64 %e
|
||||
}
|
||||
|
||||
; CHECK-LABEL: (func $load_signed_i1_i64
|
||||
; CHECK: (setlocal @1 (load_zx_i8_i64 @0))
|
||||
; CHECK-LABEL: (func $load_s_i1_i64
|
||||
; CHECK: (setlocal @1 (load_u_i8_i64 @0))
|
||||
; CHECK-NEXT: (setlocal @2 (immediate 63))
|
||||
; CHECK-NEXT: (setlocal @3 (shl @1 @2))
|
||||
; CHECK-NEXT: (setlocal @4 (shr_s @3 @2))
|
||||
; CHECK-NEXT: (return @4)
|
||||
define i64 @load_signed_i1_i64(i1* %p) {
|
||||
define i64 @load_s_i1_i64(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
%e = sext i1 %v to i64
|
||||
ret i64 %e
|
||||
|
|
Loading…
Reference in New Issue