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IslAst: always use the context during ast generation 

Providing the context to the ast generator allows for additional simplifcations
and -- more importantly -- allows to generate loops with only partially bounded
domains, assuming the domains are bounded for all parameter configurations
that are valid as defined by the context.

This change fixes the crash reported in http://llvm.org/PR30956

The original reason why we did not include the context when generating an
AST was that CLooG and later isl used to sometimes transfer some of the
constraints that bound the size of parameters from the context into the
generated AST. This resulted in operations with very large constants, which
sometimes introduced problematic integer overflows. The latest versions of
the isl AST generator are careful to not introduce such constants.

Reported-by: Eli Friedman <efriedma@codeaurora.org>
llvm-svn: 286442
This commit is contained in:
Tobias Grosser 2016-11-10 09:39:58 +00:00
parent 1fbb482928
commit d0b9173caa
5 changed files with 57 additions and 19 deletions
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2
polly/lib/CodeGen/IslAst.cpp
View File

@ -63,7 +63,7 @@ static cl::opt<bool> PollyParallelForce(
static cl::opt<bool> UseContext("polly-ast-use-context",
cl::desc("Use context"), cl::Hidden,
cl::init(false), cl::ZeroOrMore,
cl::init(true), cl::ZeroOrMore,
cl::cat(PollyCategory));
static cl::opt<bool> DetectParallel("polly-ast-detect-parallel",

50
polly/test/Isl/Ast/domain_bounded_only_with_context.ll Normal file
View File

@ -0,0 +1,50 @@
; RUN: opt %loadPolly -polly-ast -analyze < %s | FileCheck %s
; CHECK: {
; CHECK-NEXT: if (p <= -1 || p >= 1)
; CHECK-NEXT: Stmt_preheader();
; CHECK-NEXT: for (int c0 = 0; c0 < 2 * p; c0 += 1)
; CHECK-NEXT: Stmt_loop(c0);
; CHECK-NEXT: if (p <= -1) {
; CHECK-NEXT: for (int c0 = 0; c0 <= 2 * p + 255; c0 += 1)
; CHECK-NEXT: Stmt_loop(c0);
; CHECK-NEXT: } else if (p == 0) {
; CHECK-NEXT: Stmt_side();
; CHECK-NEXT: }
; CHECK-NEXT: }
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
define void @zot(float* %A, i32 %arg) {
bb:
%p = ashr i32 %arg, 25
%tmpEven = shl nsw i32 %p, 1
%tmp3 = and i32 %tmpEven, 254
br label %cond
cond:
%tmpEvenTrunc = trunc i32 %tmpEven to i8
%br.cmp = icmp eq i8 %tmpEvenTrunc, 0
br i1 %br.cmp, label %side, label %preheader
preheader:
store float 1.0, float* %A
br label %loop
loop:
%indvar = phi i32 [ %indvar.next, %loop ], [ 1, %preheader ]
store float 1.0, float* %A
%indvar.next = add nuw nsw i32 %indvar, 1
%cmp = icmp eq i32 %indvar, %tmp3
br i1 %cmp, label %exit, label %loop
side:
store float 1.0, float* %A
br label %ret
exit:
br label %ret
ret:
ret void
}

2
polly/test/Isl/Ast/simple-run-time-condition.ll
View File

@ -17,7 +17,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; for the delinearization is simplified such that conditions that would not
; cause any code to be executed are not generated.
; CHECK: if (((o >= 1 && q <= 0 && m + q >= 0) || (o <= 0 && m + q >= 100 && q <= 100)) && 0 == ((o <= 0 && n >= 1 && m + q >= 9223372036854775909) || (m >= 1 && n + p >= 9223372036854775809) || (o <= 0 && m >= 1 && n >= 1 && q <= -9223372036854775709)))
; CHECK: if (((o >= 1 && q <= 0 && m + q >= 0) || (o <= 0 && m + q >= 100 && q <= 100)) && 0 == ((m >= 1 && n + p >= 9223372036854775809) || (o <= 0 && n >= 1 && m + q >= 9223372036854775909) || (o <= 0 && m >= 1 && n >= 1 && q <= -9223372036854775709)))
; CHECK: if (o <= 0) {
; CHECK: for (int c0 = 0; c0 < n; c0 += 1)

20
polly/test/Isl/CodeGen/exprModDiv.ll
View File

@ -30,16 +30,8 @@
; CHECK: %pexp.p_div_q = udiv i64 %polly.indvar, 127
; CHECK: %polly.access.B10 = getelementptr float, float* %B, i64 %pexp.p_div_q
; #define floord(n,d) ((n < 0) ? (n - d + 1) : n) / d
; A[p + 127 * floord(-p - 1, 127) + 127]
; CHECK: %pexp.fdiv_q.0 = sub nsw i64 %p, 127
; CHECK: %pexp.fdiv_q.1 = add nsw i64 %pexp.fdiv_q.0, 1
; CHECK: %pexp.fdiv_q.2 = icmp slt i64 %p, 0
; CHECK: %pexp.fdiv_q.3 = select i1 %pexp.fdiv_q.2, i64 %pexp.fdiv_q.1, i64 %p
; CHECK: %pexp.fdiv_q.4 = sdiv i64 %pexp.fdiv_q.3, 127
; CHECK: %[[r1:[0-9]*]] = mul nsw i64 127, %pexp.fdiv_q.4
; CHECK: %[[r2:[0-9]*]] = sub nsw i64 %p, %[[r1]]
; CHECK: %polly.access.A11 = getelementptr float, float* %A, i64 %[[r2]]
; A[p % 128]
; CHECK: %polly.access.A11 = getelementptr float, float* %A, i64 0
; A[p / 127]
; CHECK: %pexp.div = sdiv exact i64 %p, 127
@ -53,12 +45,8 @@
; POW2: %pexp.p_div_q = udiv i64 %polly.indvar, 128
; POW2: %polly.access.B10 = getelementptr float, float* %B, i64 %pexp.p_div_q
; #define floord(n,d) ((n < 0) ? (n - d + 1) : n) / d
; A[p + 128 * floord(-p - 1, 128) + 128]
; POW2: %polly.fdiv_q.shr = ashr i64 %p, 7
; POW2: %[[r1:[0-9]*]] = mul nsw i64 128, %polly.fdiv_q.shr
; POW2: %[[r2:[0-9]*]] = sub nsw i64 %p, %[[r1]]
; POW2: %polly.access.A11 = getelementptr float, float* %A, i64 %[[r2]]
; A[p % 128]
; POW2: %polly.access.A11 = getelementptr float, float* %A, i64 0
; A[p / 128]
; POW2: %pexp.div = sdiv exact i64 %p, 128

2
polly/test/ScheduleOptimizer/full_partial_tile_separation.ll
View File

@ -17,7 +17,7 @@
; CHECK-NEXT: for (int c5 = 0; c5 <= min(31, nk - 32 * c2 - 1); c5 += 1) {
; CHECK-NEXT: // SIMD
; CHECK-NEXT: for (int c6 = 0; c6 < nj % 4; c6 += 1)
; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, -((nj + 4) % 4) + nj + c6, 32 * c2 + c5);
; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, -(nj % 4) + nj + c6, 32 * c2 + c5);
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: }