forked from OSchip/llvm-project
[X86] Autogenerate complete checks. NFC
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
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@ -21,67 +22,156 @@
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define void @test1(float %src, i16* %dest) {
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; LIBCALL-LABEL: test1:
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; LIBCALL: # %bb.0:
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; LIBCALL-NEXT: pushq %rbx
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; LIBCALL-NEXT: .cfi_def_cfa_offset 16
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; LIBCALL-NEXT: .cfi_offset %rbx, -16
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; LIBCALL-NEXT: movq %rdi, %rbx
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; LIBCALL-NEXT: callq __gnu_f2h_ieee
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; LIBCALL-NEXT: movw %ax, (%rbx)
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; LIBCALL-NEXT: popq %rbx
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; LIBCALL-NEXT: .cfi_def_cfa_offset 8
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; LIBCALL-NEXT: retq
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;
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; F16C-LABEL: test1:
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; F16C: # %bb.0:
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; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
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; F16C-NEXT: vmovd %xmm0, %eax
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; F16C-NEXT: movw %ax, (%rdi)
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; F16C-NEXT: retq
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;
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; SOFTFLOAT-LABEL: test1:
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; SOFTFLOAT: # %bb.0:
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; SOFTFLOAT-NEXT: pushq %rbx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 16
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; SOFTFLOAT-NEXT: .cfi_offset %rbx, -16
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; SOFTFLOAT-NEXT: movq %rsi, %rbx
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; SOFTFLOAT-NEXT: callq __gnu_f2h_ieee
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; SOFTFLOAT-NEXT: movw %ax, (%rbx)
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; SOFTFLOAT-NEXT: popq %rbx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 8
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; SOFTFLOAT-NEXT: retq
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%1 = tail call i16 @llvm.convert.to.fp16.f32(float %src)
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store i16 %1, i16* %dest, align 2
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ret void
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}
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; CHECK-LABEL: test1
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; LIBCALL: callq __gnu_f2h_ieee
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; SOFTFLOAT: callq __gnu_f2h_ieee
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; F16C: vcvtps2ph
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; CHECK: ret
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define float @test2(i16* nocapture %src) {
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; LIBCALL-LABEL: test2:
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; LIBCALL: # %bb.0:
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; LIBCALL-NEXT: movzwl (%rdi), %edi
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; LIBCALL-NEXT: jmp __gnu_h2f_ieee # TAILCALL
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;
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; F16C-LABEL: test2:
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; F16C: # %bb.0:
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; F16C-NEXT: movzwl (%rdi), %eax
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; F16C-NEXT: vmovd %eax, %xmm0
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; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; F16C-NEXT: retq
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;
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; SOFTFLOAT-LABEL: test2:
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; SOFTFLOAT: # %bb.0:
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; SOFTFLOAT-NEXT: pushq %rax
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 16
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; SOFTFLOAT-NEXT: movzwl (%rdi), %edi
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; SOFTFLOAT-NEXT: callq __gnu_h2f_ieee
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; SOFTFLOAT-NEXT: popq %rcx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 8
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; SOFTFLOAT-NEXT: retq
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%1 = load i16, i16* %src, align 2
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%2 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
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ret float %2
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}
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; CHECK-LABEL: test2:
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; LIBCALL: jmp __gnu_h2f_ieee
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; SOFTFLOAT: callq __gnu_h2f_ieee
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; F16C: vcvtph2ps
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; F16C: ret
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define float @test3(float %src) nounwind uwtable readnone {
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; LIBCALL-LABEL: test3:
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; LIBCALL: # %bb.0:
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; LIBCALL-NEXT: pushq %rax
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; LIBCALL-NEXT: .cfi_def_cfa_offset 16
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; LIBCALL-NEXT: callq __gnu_f2h_ieee
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; LIBCALL-NEXT: movzwl %ax, %edi
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; LIBCALL-NEXT: popq %rax
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; LIBCALL-NEXT: .cfi_def_cfa_offset 8
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; LIBCALL-NEXT: jmp __gnu_h2f_ieee # TAILCALL
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;
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; F16C-LABEL: test3:
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; F16C: # %bb.0:
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; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
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; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; F16C-NEXT: retq
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;
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; SOFTFLOAT-LABEL: test3:
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; SOFTFLOAT: # %bb.0:
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; SOFTFLOAT-NEXT: pushq %rax
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 16
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; SOFTFLOAT-NEXT: callq __gnu_f2h_ieee
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; SOFTFLOAT-NEXT: movzwl %ax, %edi
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; SOFTFLOAT-NEXT: callq __gnu_h2f_ieee
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; SOFTFLOAT-NEXT: popq %rcx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 8
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; SOFTFLOAT-NEXT: retq
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%1 = tail call i16 @llvm.convert.to.fp16.f32(float %src)
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%2 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
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ret float %2
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}
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; CHECK-LABEL: test3:
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; LIBCALL: callq __gnu_f2h_ieee
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; LIBCALL: jmp __gnu_h2f_ieee
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; SOFTFLOAT: callq __gnu_f2h_ieee
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; SOFTFLOAT: callq __gnu_h2f_ieee
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; F16C: vcvtps2ph
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; F16C-NEXT: vcvtph2ps
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; F16C: ret
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define double @test4(i16* nocapture %src) {
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; LIBCALL-LABEL: test4:
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; LIBCALL: # %bb.0:
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; LIBCALL-NEXT: pushq %rax
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; LIBCALL-NEXT: .cfi_def_cfa_offset 16
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; LIBCALL-NEXT: movzwl (%rdi), %edi
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; LIBCALL-NEXT: callq __gnu_h2f_ieee
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; LIBCALL-NEXT: cvtss2sd %xmm0, %xmm0
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; LIBCALL-NEXT: popq %rax
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; LIBCALL-NEXT: .cfi_def_cfa_offset 8
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; LIBCALL-NEXT: retq
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;
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; F16C-LABEL: test4:
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; F16C: # %bb.0:
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; F16C-NEXT: movzwl (%rdi), %eax
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; F16C-NEXT: vmovd %eax, %xmm0
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; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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; F16C-NEXT: retq
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;
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; SOFTFLOAT-LABEL: test4:
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; SOFTFLOAT: # %bb.0:
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; SOFTFLOAT-NEXT: pushq %rax
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 16
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; SOFTFLOAT-NEXT: movzwl (%rdi), %edi
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; SOFTFLOAT-NEXT: callq __gnu_h2f_ieee
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; SOFTFLOAT-NEXT: movl %eax, %edi
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; SOFTFLOAT-NEXT: callq __extendsfdf2
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; SOFTFLOAT-NEXT: popq %rcx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 8
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; SOFTFLOAT-NEXT: retq
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%1 = load i16, i16* %src, align 2
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%2 = tail call double @llvm.convert.from.fp16.f64(i16 %1)
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ret double %2
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}
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; CHECK-LABEL: test4:
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; LIBCALL: callq __gnu_h2f_ieee
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; LIBCALL: cvtss2sd
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; SOFTFLOAT: callq __gnu_h2f_ieee
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; SOFTFLOAT: callq __extendsfdf2
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; F16C: vcvtph2ps
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; F16C: vcvtss2sd
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; F16C: ret
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define i16 @test5(double %src) {
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; LIBCALL-LABEL: test5:
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; LIBCALL: # %bb.0:
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; LIBCALL-NEXT: jmp __truncdfhf2 # TAILCALL
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;
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; F16C-LABEL: test5:
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; F16C: # %bb.0:
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; F16C-NEXT: jmp __truncdfhf2 # TAILCALL
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;
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; SOFTFLOAT-LABEL: test5:
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; SOFTFLOAT: # %bb.0:
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; SOFTFLOAT-NEXT: pushq %rax
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 16
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; SOFTFLOAT-NEXT: callq __truncdfhf2
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; SOFTFLOAT-NEXT: popq %rcx
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; SOFTFLOAT-NEXT: .cfi_def_cfa_offset 8
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; SOFTFLOAT-NEXT: retq
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%val = tail call i16 @llvm.convert.to.fp16.f64(double %src)
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ret i16 %val
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}
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; CHECK-LABEL: test5:
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; LIBCALL: jmp __truncdfhf2
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; SOFTFLOAT: callq __truncdfhf2
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; F16C: jmp __truncdfhf2
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declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
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declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone
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