forked from OSchip/llvm-project
Moving the GPUIndexIntrinsicOpLowering template to a common location
The GPUIndexIntrinsicOpLowering template is currently used by the code in both the GPUToNVVM and GPUToROCDL dirs. Moving it to a common location to remove code duplication. Closes tensorflow/mlir#163 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/163 from deven-amd:deven-refactor-gpu-index-ops-lowering b8dc2a5f5353df196039b6ff2ad42106028693ed PiperOrigin-RevId: 272863297
This commit is contained in:
Deven Desai
A. Unique TensorFlower
parent
85dcaf19c7
commit
d064469f6f
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//===- IndexIntrinsicsOpLowering.h - GPU IndexOps Lowering class *- C++ -*-===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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#ifndef MLIR_CONVERSION_GPUCOMMON_INDEXINTRINSICSOPLOWERING_H_
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#define MLIR_CONVERSION_GPUCOMMON_INDEXINTRINSICSOPLOWERING_H_
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "llvm/ADT/StringSwitch.h"
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namespace mlir {
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// Rewriting that replaces Op with XOp, YOp, or ZOp depending on the dimension
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// that Op operates on. Op is assumed to return an `std.index` value and
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// XOp, YOp and ZOp are assumed to return an `llvm.i32` value. Depending on
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// `indexBitwidth`, sign-extend or truncate the resulting value to match the
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// bitwidth expected by the consumers of the value.
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template <typename Op, typename XOp, typename YOp, typename ZOp>
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struct GPUIndexIntrinsicOpLowering : public LLVMOpLowering {
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private:
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enum dimension { X = 0, Y = 1, Z = 2, invalid };
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unsigned indexBitwidth;
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static dimension dimensionToIndex(Op op) {
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return llvm::StringSwitch<dimension>(op.dimension())
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.Case("x", X)
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.Case("y", Y)
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.Case("z", Z)
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.Default(invalid);
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}
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static unsigned getIndexBitWidth(LLVMTypeConverter &type_converter) {
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auto dialect = type_converter.getDialect();
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return dialect->getLLVMModule().getDataLayout().getPointerSizeInBits();
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}
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public:
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explicit GPUIndexIntrinsicOpLowering(LLVMTypeConverter &lowering_)
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: LLVMOpLowering(Op::getOperationName(),
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lowering_.getDialect()->getContext(), lowering_),
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indexBitwidth(getIndexBitWidth(lowering_)) {}
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// Convert the kernel arguments to an LLVM type, preserve the rest.
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto dialect = lowering.getDialect();
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Value *newOp;
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switch (dimensionToIndex(cast<Op>(op))) {
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case X:
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newOp = rewriter.create<XOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Y:
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newOp = rewriter.create<YOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Z:
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newOp = rewriter.create<ZOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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default:
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return matchFailure();
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}
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if (indexBitwidth > 32) {
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newOp = rewriter.create<LLVM::SExtOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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} else if (indexBitwidth < 32) {
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newOp = rewriter.create<LLVM::TruncOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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}
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rewriter.replaceOp(op, {newOp});
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return matchSuccess();
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}
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};
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} // namespace mlir
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#endif // MLIR_CONVERSION_GPUCOMMON_INDEXINTRINSICSOPLOWERING_H_
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@ -22,87 +22,18 @@
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#include "mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/LLVMIR/NVVMDialect.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassRegistry.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "../GPUCommon/IndexIntrinsicsOpLowering.h"
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using namespace mlir;
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namespace {
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// Rewriting that replaces Op with XOp, YOp, or ZOp depending on the dimension
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// that Op operates on. Op is assumed to return an `std.index` value and
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// XOp, YOp and ZOp are assumed to return an `llvm.i32` value. Depending on
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// `indexBitwidth`, sign-extend or truncate the resulting value to match the
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// bitwidth expected by the consumers of the value.
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template <typename Op, typename XOp, typename YOp, typename ZOp>
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struct GPUIndexIntrinsicOpLowering : public LLVMOpLowering {
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private:
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enum dimension { X = 0, Y = 1, Z = 2, invalid };
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unsigned indexBitwidth;
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static dimension dimensionToIndex(Op op) {
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return llvm::StringSwitch<dimension>(op.dimension())
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.Case("x", X)
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.Case("y", Y)
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.Case("z", Z)
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.Default(invalid);
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}
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static unsigned getIndexBitWidth(LLVMTypeConverter &lowering) {
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auto dialect = lowering.getDialect();
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return dialect->getLLVMModule().getDataLayout().getPointerSizeInBits();
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}
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public:
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explicit GPUIndexIntrinsicOpLowering(LLVMTypeConverter &lowering_)
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: LLVMOpLowering(Op::getOperationName(),
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lowering_.getDialect()->getContext(), lowering_),
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indexBitwidth(getIndexBitWidth(lowering_)) {}
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// Convert the kernel arguments to an LLVM type, preserve the rest.
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto dialect = lowering.getDialect();
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Value *newOp;
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switch (dimensionToIndex(cast<Op>(op))) {
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case X:
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newOp = rewriter.create<XOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Y:
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newOp = rewriter.create<YOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Z:
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newOp = rewriter.create<ZOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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default:
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return matchFailure();
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}
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if (indexBitwidth > 32) {
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newOp = rewriter.create<LLVM::SExtOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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} else if (indexBitwidth < 32) {
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newOp = rewriter.create<LLVM::TruncOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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}
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rewriter.replaceOp(op, {newOp});
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return matchSuccess();
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}
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};
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// Converts all_reduce op to LLVM/NVVM ops.
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struct GPUAllReduceOpLowering : public LLVMOpLowering {
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explicit GPUAllReduceOpLowering(LLVMTypeConverter &lowering_)
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@ -22,86 +22,18 @@
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#include "mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "../GPUCommon/IndexIntrinsicsOpLowering.h"
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using namespace mlir;
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namespace {
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// Rewriting that replaces Op with XOp, YOp, or ZOp depending on the dimension
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// that Op operates on. Op is assumed to return an `std.index` value and
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// XOp, YOp and ZOp are assumed to return an `llvm.i32` value. Depending on
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// `indexBitwidth`, sign-extend or truncate the resulting value to match the
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// bitwidth expected by the consumers of the value.
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template <typename Op, typename XOp, typename YOp, typename ZOp>
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struct GPUIndexIntrinsicOpLowering : public LLVMOpLowering {
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private:
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enum dimension { X = 0, Y = 1, Z = 2, invalid };
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unsigned indexBitwidth;
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static dimension dimensionToIndex(Op op) {
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return llvm::StringSwitch<dimension>(op.dimension())
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.Case("x", X)
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.Case("y", Y)
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.Case("z", Z)
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.Default(invalid);
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}
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static unsigned getIndexBitWidth(LLVMTypeConverter &type_converter) {
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auto dialect = type_converter.getDialect();
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return dialect->getLLVMModule().getDataLayout().getPointerSizeInBits();
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}
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public:
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explicit GPUIndexIntrinsicOpLowering(LLVMTypeConverter &lowering_)
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: LLVMOpLowering(Op::getOperationName(),
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lowering_.getDialect()->getContext(), lowering_),
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indexBitwidth(getIndexBitWidth(lowering_)) {}
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// Convert the kernel arguments to an LLVM type, preserve the rest.
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto dialect = lowering.getDialect();
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Value *newOp;
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switch (dimensionToIndex(cast<Op>(op))) {
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case X:
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newOp = rewriter.create<XOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Y:
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newOp = rewriter.create<YOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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case Z:
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newOp = rewriter.create<ZOp>(loc, LLVM::LLVMType::getInt32Ty(dialect));
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break;
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default:
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return matchFailure();
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}
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if (indexBitwidth > 32) {
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newOp = rewriter.create<LLVM::SExtOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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} else if (indexBitwidth < 32) {
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newOp = rewriter.create<LLVM::TruncOp>(
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loc, LLVM::LLVMType::getIntNTy(dialect, indexBitwidth), newOp);
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}
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rewriter.replaceOp(op, {newOp});
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return matchSuccess();
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}
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};
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// A pass that replaces all occurrences of GPU device operations with their
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// corresponding ROCDL equivalent.
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//
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