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Added pinsrd, pinsrq, and some other vector intrinsics 

llvm-svn: 57563
This commit is contained in:
Mon P Wang 2008-10-15 06:18:34 +00:00
parent 6e979020cd
commit d05269d13c
2 changed files with 8 additions and 0 deletions
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4
clang/include/clang/AST/X86Builtins.def
View File

@ -421,6 +421,10 @@ BUILTIN(__builtin_ia32_vec_ext_v4hi, "sV4si", "")
BUILTIN(__builtin_ia32_vec_ext_v2si, "iV2ii", "")
BUILTIN(__builtin_ia32_vec_set_v8hi, "V8sV8ssi", "")
BUILTIN(__builtin_ia32_vec_set_v4hi, "V4sV4ssi", "")
BUILTIN(__builtin_ia32_vec_set_v16qi, "V16cV16cii", "")
BUILTIN(__builtin_ia32_vec_set_v4si, "V4iV4iii", "")
BUILTIN(__builtin_ia32_vec_set_v2di, "V2LLV2LLLLi", "")
BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fi", "")
BUILTIN(__builtin_ia32_movqv4si, "V4iV4i", "")
BUILTIN(__builtin_ia32_loadlv4si, "V4iV2i*", "")

4
clang/lib/CodeGen/CGBuiltin.cpp
View File

@ -902,6 +902,10 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_vec_set_v4hi:
case X86::BI__builtin_ia32_vec_set_v8hi:
return Builder.CreateInsertElement(Ops[0], Ops[1], Ops[2], "pinsrw");
case X86::BI__builtin_ia32_vec_set_v4si:
return Builder.CreateInsertElement(Ops[0], Ops[1], Ops[2], "pinsrd");
case X86::BI__builtin_ia32_vec_set_v2di:
return Builder.CreateInsertElement(Ops[0], Ops[1], Ops[2], "pinsrq");
case X86::BI__builtin_ia32_andps:
case X86::BI__builtin_ia32_andpd:
case X86::BI__builtin_ia32_andnps: