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[SelectionDAG] GetDemandedBits - update OR/XOR ops to just call SimplifyMultipleUseDemandedBits. 

Eventually all of these will be moved over, but we create nodes in GetDemandedBits recursion at the moment which causes regressions when we try to remove them all.

llvm-svn: 367092
This commit is contained in:
Simon Pilgrim 2019-07-26 09:13:29 +00:00
parent b32ceb79b0
commit d0164fc525
1 changed files with 2 additions and 6 deletions
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8
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -2154,12 +2154,8 @@ SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
} }
case ISD::OR: case ISD::OR:
case ISD::XOR: case ISD::XOR:
// If the LHS or RHS don't contribute bits to the or, drop them. return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
if (MaskedValueIsZero(V.getOperand(0), DemandedBits)) *this, 0);
return V.getOperand(1);
if (MaskedValueIsZero(V.getOperand(1), DemandedBits))
return V.getOperand(0);
break;
case ISD::SRL: case ISD::SRL:
// Only look at single-use SRLs. // Only look at single-use SRLs.
if (!V.getNode()->hasOneUse()) if (!V.getNode()->hasOneUse())