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Emit target specific nodes to handle splats starting at zero indicies 

llvm-svn: 113055
This commit is contained in:
Bruno Cardoso Lopes 2010-09-04 02:02:14 +00:00
parent 95759917eb
commit cff7cd18ab
1 changed files with 8 additions and 1 deletions
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9
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -5470,10 +5470,17 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
// FIXME: pshufb, blends, shifts. // FIXME: pshufb, blends, shifts.
if (VT.getVectorNumElements() == 2 || if (VT.getVectorNumElements() == 2 ||
ShuffleVectorSDNode::isSplatMask(&M[0], VT) ||
isPALIGNRMask(M, VT, Subtarget->hasSSSE3())) isPALIGNRMask(M, VT, Subtarget->hasSSSE3()))
return Op; return Op;
if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
SVOp->getSplatIndex() == 0 && V2IsUndef) {
if (VT == MVT::v2f64)
return getTargetShuffleNode(X86ISD::UNPCKLPD, dl, VT, V1, V1, DAG);
if (VT == MVT::v2i64)
return getTargetShuffleNode(X86ISD::PUNPCKLQDQ, dl, VT, V1, V1, DAG);
}
if (isPSHUFHWMask(M, VT)) if (isPSHUFHWMask(M, VT))
return getTargetShuffleNode(X86ISD::PSHUFHW, dl, VT, V1, return getTargetShuffleNode(X86ISD::PSHUFHW, dl, VT, V1,
X86::getShufflePSHUFHWImmediate(SVOp), X86::getShufflePSHUFHWImmediate(SVOp),