forked from OSchip/llvm-project
Make vec_fabs.ll pass with MSVC 2013
We should revert this change once we drop support for MSVC 2013. llvm-svn: 279979
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@ -6,6 +6,9 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VLDQ
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; FIXME: Drop the regex pattern matching of 'nan' once we drop support for MSVC
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; 2013.
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define <2 x double> @fabs_v2f64(<2 x double> %p) {
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; X32-LABEL: fabs_v2f64:
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; X32: # BB#0:
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@ -135,7 +138,7 @@ declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
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define <8 x double> @fabs_v8f64(<8 x double> %p) {
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; X32_AVX-LABEL: fabs_v8f64:
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; X32_AVX: # BB#0:
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; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan]
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; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
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; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
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; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
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; X32_AVX-NEXT: retl
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@ -153,7 +156,7 @@ define <8 x double> @fabs_v8f64(<8 x double> %p) {
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;
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; X64_AVX-LABEL: fabs_v8f64:
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; X64_AVX: # BB#0:
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; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan]
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; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
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; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
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; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
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; X64_AVX-NEXT: retq
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@ -176,7 +179,7 @@ declare <8 x double> @llvm.fabs.v8f64(<8 x double> %p)
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define <16 x float> @fabs_v16f32(<16 x float> %p) {
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; X32_AVX-LABEL: fabs_v16f32:
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; X32_AVX: # BB#0:
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; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan,nan,nan,nan,nan]
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; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
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; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
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; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
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; X32_AVX-NEXT: retl
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@ -194,7 +197,7 @@ define <16 x float> @fabs_v16f32(<16 x float> %p) {
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;
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; X64_AVX-LABEL: fabs_v16f32:
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; X64_AVX: # BB#0:
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; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan,nan,nan,nan,nan]
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; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
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; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
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; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
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; X64_AVX-NEXT: retq
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