forked from OSchip/llvm-project
[X86] Disable FixupSetCC for CodeGenOpt::None
It is an optimization pass, and should not run at -O0. Especially since Fast RA will not do the required register coalescing anyway, so it's a loss even from the optimization standpoint. This also works around (but doesn't quite fix) PR28489. llvm-svn: 275099
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@ -304,10 +304,10 @@ bool X86PassConfig::addPreISel() {
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}
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void X86PassConfig::addPreRegAlloc() {
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addPass(createX86FixupSetCC());
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createX86OptimizeLEAs());
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if (getOptLevel() != CodeGenOpt::None) {
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addPass(createX86FixupSetCC());
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addPass(createX86OptimizeLEAs());
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}
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addPass(createX86CallFrameOptimization());
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addPass(createX86WinAllocaExpander());
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@ -0,0 +1,15 @@
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; ; RUN: llc < %s -mtriple=i686-pc-linux -O0 | FileCheck %s
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declare void @g(i32, i1)
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;CHECK-LABEL: f:
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;CHECK: cmpxchg8b
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;CHECK: sete %cl
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;CHECK: movzbl %cl
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define void @f(i64* %arg, i64 %arg1) {
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entry:
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%tmp5 = cmpxchg i64* %arg, i64 %arg1, i64 %arg1 seq_cst seq_cst
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%tmp7 = extractvalue { i64, i1 } %tmp5, 1
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%tmp9 = zext i1 %tmp7 to i32
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call void @g(i32 %tmp9, i1 %tmp7)
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ret void
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}
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