ARM: remove ARM/Thumb distinction for preferred alignment.

Thumb1 has legitimate reasons for preferring 32-bit alignment of types
i1/i8/i16, since the 16-bit encoding of "add rD, sp, #imm" requires #imm to be
a multiple of 4. However, this is a trade-off betweem code size and RAM usage;
the DataLayout string is not the best place to represent it even if desired.

So this patch removes the extra Thumb requirements, hopefully making ARM and
Thumb completely compatible in this respect.

llvm-svn: 219734
This commit is contained in:
Tim Northover 2014-10-14 22:12:17 +00:00
parent 9a4c043d67
commit cf6ce0c8f7
4 changed files with 23 additions and 14 deletions

View File

@ -102,11 +102,6 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
// Pointers are 32 bits and aligned to 32 bits.
Ret += "-p:32:32";
// On thumb, i16,i18 and i1 have natural aligment requirements, but we try to
// align to 32.
if (ST.isThumb())
Ret += "-i1:8:32-i8:8:32-i16:16:32";
// ABIs other than APCS have 64 bit integers with natural alignment.
if (!ST.isAPCS_ABI())
Ret += "-i64:64";

View File

@ -1,11 +1,10 @@
; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
target triple = "thumbv7-apple-darwin10.0.0"
; CHECK: align 3
@.v = private unnamed_addr constant <4 x i32> <i32 1, i32 2, i32 3, i32 4>, align 8
; CHECK: align 2
@.strA = private unnamed_addr constant [4 x i8] c"bar\00"
; CHECK: align 4
@.strA = private unnamed_addr constant [4 x i64] zeroinitializer
; CHECK-NOT: align
@.strB = private unnamed_addr constant [4 x i8] c"foo\00", align 1
@.strC = private unnamed_addr constant [4 x i8] c"baz\00", section "__TEXT,__cstring,cstring_literals", align 1

View File

@ -1,6 +0,0 @@
; RUN: llc -mtriple=armv7-linux-gnueabi %s -o - | FileCheck %s
@var = global {i8, i8} zeroinitializer
; CHECK: .globl var
; CHECK-NEXT: .align 2

View File

@ -0,0 +1,21 @@
; RUN: llc -mtriple=armv7-linux-gnueabi %s -o - | FileCheck %s
@var_agg = global {i8, i8} zeroinitializer
; CHECK: .globl var_agg
; CHECK-NEXT: .align 2
@var1 = global i1 zeroinitializer
; CHECK: .globl var1
; CHECK-NOT: .align
@var8 = global i8 zeroinitializer
; CHECK: .globl var8
; CHECK-NOT: .align
@var16 = global i16 zeroinitializer
; CHECK: .globl var16
; CHECK-NEXT: .align 1