diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 0eaadd70a47a..0694af6507ee 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -1429,17 +1429,15 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, : (isPPC64 ? PPC::BDZLR8 : PPC::BDZLR))); } else if (Pred[0].getImm() == PPC::PRED_BIT_SET) { MI.setDesc(get(PPC::BCLR)); - MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()); + MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]); } else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) { MI.setDesc(get(PPC::BCLRn)); - MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()); + MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]); } else { MI.setDesc(get(PPC::BCCLR)); MachineInstrBuilder(*MI.getParent()->getParent(), MI) .addImm(Pred[0].getImm()) - .addReg(Pred[1].getReg()); + .add(Pred[1]); } return true; @@ -1454,7 +1452,7 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, MI.setDesc(get(PPC::BC)); MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()) + .add(Pred[1]) .addMBB(MBB); } else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) { MachineBasicBlock *MBB = MI.getOperand(0).getMBB(); @@ -1462,7 +1460,7 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, MI.setDesc(get(PPC::BCn)); MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()) + .add(Pred[1]) .addMBB(MBB); } else { MachineBasicBlock *MBB = MI.getOperand(0).getMBB(); @@ -1471,13 +1469,13 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, MI.setDesc(get(PPC::BCC)); MachineInstrBuilder(*MI.getParent()->getParent(), MI) .addImm(Pred[0].getImm()) - .addReg(Pred[1].getReg()) + .add(Pred[1]) .addMBB(MBB); } return true; - } else if (OpC == PPC::BCTR || OpC == PPC::BCTR8 || - OpC == PPC::BCTRL || OpC == PPC::BCTRL8) { + } else if (OpC == PPC::BCTR || OpC == PPC::BCTR8 || OpC == PPC::BCTRL || + OpC == PPC::BCTRL8) { if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) llvm_unreachable("Cannot predicate bctr[l] on the ctr register"); @@ -1487,14 +1485,12 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, if (Pred[0].getImm() == PPC::PRED_BIT_SET) { MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8) : (setLR ? PPC::BCCTRL : PPC::BCCTR))); - MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()); + MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]); return true; } else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) { MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n) : (setLR ? PPC::BCCTRLn : PPC::BCCTRn))); - MachineInstrBuilder(*MI.getParent()->getParent(), MI) - .addReg(Pred[1].getReg()); + MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]); return true; } @@ -1502,7 +1498,7 @@ bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, : (setLR ? PPC::BCCCTRL : PPC::BCCCTR))); MachineInstrBuilder(*MI.getParent()->getParent(), MI) .addImm(Pred[0].getImm()) - .addReg(Pred[1].getReg()); + .add(Pred[1]); return true; } diff --git a/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll b/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll index d31a5553bf9f..2e1a4cec2b52 100644 --- a/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll +++ b/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll @@ -1,4 +1,4 @@ -; RUN: llc -O2 < %s | FileCheck %s +; RUN: llc -O2 -verify-machineinstrs < %s | FileCheck %s ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-grtev4-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/cr-spills.ll b/llvm/test/CodeGen/PowerPC/cr-spills.ll index 1a903115c0da..170744679c88 100644 --- a/llvm/test/CodeGen/PowerPC/cr-spills.ll +++ b/llvm/test/CodeGen/PowerPC/cr-spills.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll b/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll index 1a669eb051d8..0824bb2766f8 100644 --- a/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll +++ b/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=a2 | FileCheck %s +; RUN: llc -verify-machineinstrs < %s -mcpu=a2 | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll b/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll index cce23fabf63e..0d139c3d5496 100644 --- a/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll +++ b/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=ppc32 < %s | FileCheck %s +; RUN: llc -mcpu=ppc32 -verify-machineinstrs < %s | FileCheck %s target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" target triple = "powerpc-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll index 54abd181f82c..c94233106b65 100644 --- a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll +++ b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/early-ret2.ll b/llvm/test/CodeGen/PowerPC/early-ret2.ll index f9758d3f7d4c..67a496adf14a 100644 --- a/llvm/test/CodeGen/PowerPC/early-ret2.ll +++ b/llvm/test/CodeGen/PowerPC/early-ret2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-CRB +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-CRB target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll b/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll index baa8d87562cf..de75469f16ba 100644 --- a/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll +++ b/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll @@ -1,5 +1,5 @@ ; ModuleID = 'bugpoint-reduced-instructions.bc' -; RUN: llc -O2 -o - %s | FileCheck %s +; RUN: llc -O2 -o - %s -verify-machineinstrs | FileCheck %s source_filename = "bugpoint-output-9ad75f8.bc" target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll b/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll index 4d5b9170ece0..0b9ba93c4356 100644 --- a/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll +++ b/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/negctr.ll b/llvm/test/CodeGen/PowerPC/negctr.ll index 2e649930da61..7ed4b6ae4b84 100644 --- a/llvm/test/CodeGen/PowerPC/negctr.ll +++ b/llvm/test/CodeGen/PowerPC/negctr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mcpu=a2 | FileCheck %s -; RUN: llc < %s -mcpu=a2 -disable-lsr | FileCheck -check-prefix=NOLSR %s +; RUN: llc < %s -mcpu=a2 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mcpu=a2 -disable-lsr -verify-machineinstrs | FileCheck -check-prefix=NOLSR %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll index 621bda04159a..8a5aa6a9119c 100644 --- a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll +++ b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE -; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE ; ; Note: Lots of tests use inline asm instead of regular calls. ; This allows to have a better control on what the allocation will do. diff --git a/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll b/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll index 3468a91a1b63..19b85efbf062 100644 --- a/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll +++ b/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" target triple = "powerpc-montavista-linux-gnuspe" diff --git a/llvm/test/CodeGen/PowerPC/pr16556.ll b/llvm/test/CodeGen/PowerPC/pr16556.ll index dc36f0b6eafc..eea2db4501ed 100644 --- a/llvm/test/CodeGen/PowerPC/pr16556.ll +++ b/llvm/test/CodeGen/PowerPC/pr16556.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s +; RUN: llc -verify-machineinstrs < %s ; This test formerly failed due to no handling for a ppc_fp128 undef. diff --git a/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll b/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll index cb958d416306..4c10c3813fb5 100644 --- a/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll +++ b/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll @@ -1,5 +1,5 @@ -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck \ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s +; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck \ ; RUN: %s --check-prefix=CHECK-P9 ; Verify peephole simplification of splats and swaps. Bugpoint-reduced diff --git a/llvm/test/CodeGen/PowerPC/pr25157.ll b/llvm/test/CodeGen/PowerPC/pr25157.ll index 7d89d29af443..982dfcd74a8e 100644 --- a/llvm/test/CodeGen/PowerPC/pr25157.ll +++ b/llvm/test/CodeGen/PowerPC/pr25157.ll @@ -1,5 +1,5 @@ -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck \ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s +; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck \ ; RUN: --check-prefix=CHECK-P9 %s ; Verify correct generation of an lxsspx rather than an invalid optimization diff --git a/llvm/test/CodeGen/PowerPC/stwu-sched.ll b/llvm/test/CodeGen/PowerPC/stwu-sched.ll index 89abacfd9da3..a8a889657068 100644 --- a/llvm/test/CodeGen/PowerPC/stwu-sched.ll +++ b/llvm/test/CodeGen/PowerPC/stwu-sched.ll @@ -1,8 +1,8 @@ -; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \ +; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s +; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s \ ; RUN: --check-prefix=CHECK-ITIN -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s \ ; RUN: --check-prefix=CHECK-ITIN diff --git a/llvm/test/CodeGen/PowerPC/stwux.ll b/llvm/test/CodeGen/PowerPC/stwux.ll index 4f83c9f64ea5..157e23e35c5d 100644 --- a/llvm/test/CodeGen/PowerPC/stwux.ll +++ b/llvm/test/CodeGen/PowerPC/stwux.ll @@ -1,6 +1,6 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s @multvec_i = external unnamed_addr global [100 x i32], align 4 diff --git a/llvm/test/CodeGen/PowerPC/vsel-prom.ll b/llvm/test/CodeGen/PowerPC/vsel-prom.ll index dd219ec0da6f..79d1d83209cf 100644 --- a/llvm/test/CodeGen/PowerPC/vsel-prom.ll +++ b/llvm/test/CodeGen/PowerPC/vsel-prom.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 < %s -verify-machineinstrs | FileCheck %s target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll index 06636f24f97c..ed6b49dd7f8b 100644 --- a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll +++ b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -verify-machineinstrs | FileCheck %s target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll b/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll index 7e63530912aa..7828f228c8d8 100644 --- a/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll +++ b/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll @@ -1,4 +1,4 @@ -; RUN: llc -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s define void @ILLBeBack() #0 { ; CHECK-LABEL @ILLBeBack diff --git a/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll b/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll index fd8adff5a1d7..263a7590cf99 100644 --- a/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll +++ b/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -verify-machineinstrs | FileCheck %s target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu"