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[WebAssembly] Reapply r252858, with svn add for the new file. 

Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
 - Use the MC framework for printing almost all instructions.
 - AsmStrings are now live.
 - This introduces an indirection between LLVM vregs and WebAssembly registers,
   and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping.
   This addresses some basic issues with argument registers and unused registers.
 - The way ARGUMENT instructions are handled no longer generates redundant
   get_local+set_local for every argument.

This also changes the assembly syntax somewhat; most notably, MC's printing
does not use sigils on label names, so those are no longer present, and
push/pop now have a sigil to keep them unambiguous.

The usage of set_local/get_local/$push/$pop will continue to evolve
significantly. This patch is just one step of a larger change.

llvm-svn: 252910
This commit is contained in:
Dan Gohman 2015-11-12 17:04:33 +00:00
parent 02bf92d226
commit cf4748f180
39 changed files with 842 additions and 1074 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
llvm/lib/Target/WebAssembly/CMakeLists.txt
View File

@ -21,6 +21,7 @@ add_llvm_target(WebAssemblyCodeGen
WebAssemblyMachineFunctionInfo.cpp
WebAssemblyMCInstLower.cpp
WebAssemblyRegisterInfo.cpp
WebAssemblyRegNumbering.cpp
WebAssemblySelectionDAGInfo.cpp
WebAssemblySubtarget.cpp
WebAssemblyTargetMachine.cpp

46
llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
View File

@ -36,28 +36,50 @@ WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
unsigned RegNo) const {
if (TargetRegisterInfo::isPhysicalRegister(RegNo))
OS << getRegisterName(RegNo);
else
OS << TargetRegisterInfo::virtReg2Index(RegNo);
// FIXME: Revisit whether we actually print the get_local explicitly.
OS << "(get_local " << RegNo << ")";
}
void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot,
const MCSubtargetInfo &STI) {
printInstruction(MI, OS);
const MCInstrDesc &Desc = MII.get(MI->getOpcode());
if (Desc.isVariadic())
for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
++i) {
OS << ", ";
printOperand(MI, i, OS);
}
printAnnotation(OS, Annot);
unsigned NumDefs = MII.get(MI->getOpcode()).getNumDefs();
assert(NumDefs <= 1 &&
"Instructions with multiple result values not implemented");
if (NumDefs != 0) {
// FIXME: Revisit whether we actually print the set_local explicitly.
if (NumDefs != 0)
OS << "\n"
"\t" "set_local ";
printRegName(OS, MI->getOperand(0).getReg());
OS << ", pop";
}
"\t" "set_local " << MI->getOperand(0).getReg() << ", $pop";
}
static std::string toString(const APFloat &FP) {
static const size_t BufBytes = 128;
char buf[BufBytes];
if (FP.isNaN())
assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
FP.bitwiseIsEqual(
APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
"convertToHexString handles neither SNaN nor NaN payloads");
// Use C99's hexadecimal floating-point representation.
auto Written = FP.convertToHexString(
buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
(void)Written;
assert(Written != 0);
assert(Written < BufBytes);
return buf;
}
void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
@ -65,13 +87,13 @@ void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
if (OpNo < MII.get(MI->getOpcode()).getNumDefs())
O << "push";
O << "$push";
else
printRegName(O, Op.getReg());
} else if (Op.isImm())
O << '#' << Op.getImm();
O << Op.getImm();
else if (Op.isFPImm())
O << '#' << Op.getFPImm();
O << toString(APFloat(Op.getFPImm()));
else {
assert(Op.isExpr() && "unknown operand kind in printOperand");
Op.getExpr()->print(O, &MAI);

1
llvm/lib/Target/WebAssembly/WebAssembly.h
View File

@ -27,6 +27,7 @@ FunctionPass *createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
CodeGenOpt::Level OptLevel);
FunctionPass *createWebAssemblyCFGStackify();
FunctionPass *createWebAssemblyRegNumbering();
FunctionPass *createWebAssemblyRelooper();

181
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
View File

@ -15,12 +15,12 @@
//===----------------------------------------------------------------------===//
#include "WebAssembly.h"
#include "InstPrinter/WebAssemblyInstPrinter.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyMCInstLower.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblyRegisterInfo.h"
#include "WebAssemblySubtarget.h"
#include "InstPrinter/WebAssemblyInstPrinter.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/Analysis.h"
@ -28,7 +28,7 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DebugInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Debug.h"
@ -42,13 +42,12 @@ using namespace llvm;
namespace {
class WebAssemblyAsmPrinter final : public AsmPrinter {
const WebAssemblyInstrInfo *TII;
const MachineRegisterInfo *MRI;
unsigned NumArgs;
const WebAssemblyFunctionInfo *MFI;
public:
WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {}
: AsmPrinter(TM, std::move(Streamer)), MRI(nullptr), MFI(nullptr) {}
private:
const char *getPassName() const override {
@ -64,10 +63,8 @@ private:
}
bool runOnMachineFunction(MachineFunction &MF) override {
const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>();
TII = Subtarget.getInstrInfo();
MRI = &MF.getRegInfo();
NumArgs = MF.getInfo<WebAssemblyFunctionInfo>()->getParams().size();
MFI = MF.getInfo<WebAssemblyFunctionInfo>();
return AsmPrinter::runOnMachineFunction(MF);
}
@ -82,10 +79,8 @@ private:
void EmitEndOfAsmFile(Module &M) override;
std::string getRegTypeName(unsigned RegNo) const;
static std::string toString(const APFloat &APF);
const char *toString(MVT VT) const;
std::string regToString(const MachineOperand &MO);
std::string argToString(const MachineOperand &MO);
};
} // end anonymous namespace
@ -94,36 +89,6 @@ private:
// Helpers.
//===----------------------------------------------------------------------===//
// Operand type (if any), followed by the lower-case version of the opcode's
// name matching the names WebAssembly opcodes are expected to have. The
// tablegen names are uppercase and suffixed with their type (after an
// underscore). Conversions are additionally prefixed with their input type
// (before a double underscore).
static std::string OpcodeName(const WebAssemblyInstrInfo *TII,
const MachineInstr *MI) {
std::string N(StringRef(TII->getName(MI->getOpcode())).lower());
std::string::size_type Len = N.length();
std::string::size_type Under = N.rfind('_');
bool HasType = std::string::npos != Under;
std::string::size_type NameEnd = HasType ? Under : Len;
std::string Name(&N[0], &N[NameEnd]);
if (!HasType)
return Name;
for (const char *typelessOpcode : { "return", "call", "br_if" })
if (Name == typelessOpcode)
return Name;
std::string Type(&N[NameEnd + 1], &N[Len]);
std::string::size_type DoubleUnder = Name.find("__");
bool IsConv = std::string::npos != DoubleUnder;
if (!IsConv)
return Type + '.' + Name;
std::string InType(&Name[0], &Name[DoubleUnder]);
return Type + '.' + std::string(&Name[DoubleUnder + 2], &Name[NameEnd]) +
'/' + InType;
}
static std::string toSymbol(StringRef S) { return ("$" + S).str(); }
std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
@ -134,38 +99,12 @@ std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
return "?";
}
std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) {
static const size_t BufBytes = 128;
char buf[BufBytes];
if (FP.isNaN())
assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
FP.bitwiseIsEqual(
APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
"convertToHexString handles neither SNaN nor NaN payloads");
// Use C99's hexadecimal floating-point representation.
auto Written = FP.convertToHexString(
buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
(void)Written;
assert(Written != 0);
assert(Written < BufBytes);
return buf;
}
std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
unsigned RegNo = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(RegNo))
return WebAssemblyInstPrinter::getRegisterName(RegNo);
// WebAssembly arguments and local variables are in the same index space, and
// there are no explicit varargs, so we just add the number of arguments to
// the virtual register number to get the local variable number.
return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs);
}
std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) {
unsigned ArgNo = MO.getImm();
// Same as above, but we don't need to add NumArgs here.
return utostr(ArgNo);
return utostr(MFI->getWAReg(RegNo));
}
const char *WebAssemblyAsmPrinter::toString(MVT VT) const {
@ -203,26 +142,22 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
SmallString<128> Str;
raw_svector_ostream OS(Str);
for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getParams())
OS << "\t" ".param "
<< toString(VT) << '\n';
for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getResults())
OS << "\t" ".result "
<< toString(VT) << '\n';
for (MVT VT : MFI->getParams())
OS << "\t" ".param " << toString(VT) << '\n';
for (MVT VT : MFI->getResults())
OS << "\t" ".result " << toString(VT) << '\n';
bool FirstVReg = true;
for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
// FIXME: Don't skip dead virtual registers for now: that would require
// remapping all locals' numbers.
// if (!MRI->use_empty(VReg)) {
if (FirstVReg)
OS << "\t" ".local ";
else
OS << ", ";
OS << getRegTypeName(VReg);
FirstVReg = false;
//}
if (!MRI->use_empty(VReg)) {
if (FirstVReg)
OS << "\t" ".local ";
else
OS << ", ";
OS << getRegTypeName(VReg);
FirstVReg = false;
}
}
if (!FirstVReg)
OS << '\n';
@ -236,80 +171,36 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
SmallString<128> Str;
raw_svector_ostream OS(Str);
unsigned NumDefs = MI->getDesc().getNumDefs();
assert(NumDefs <= 1 &&
"Instructions with multiple result values not implemented");
OS << '\t';
switch (MI->getOpcode()) {
case TargetOpcode::COPY:
OS << "get_local push, " << regToString(MI->getOperand(1));
case TargetOpcode::COPY: {
// TODO: Figure out a way to lower COPY instructions to MCInst form.
SmallString<128> Str;
raw_svector_ostream OS(Str);
OS << "\t" "set_local " << regToString(MI->getOperand(0)) << ", "
"(get_local " << regToString(MI->getOperand(1)) << ")";
OutStreamer->EmitRawText(OS.str());
break;
}
case WebAssembly::ARGUMENT_I32:
case WebAssembly::ARGUMENT_I64:
case WebAssembly::ARGUMENT_F32:
case WebAssembly::ARGUMENT_F64:
OS << "get_local push, " << argToString(MI->getOperand(1));
// These represent values which are live into the function entry, so there's
// no instruction to emit.
break;
default: {
OS << OpcodeName(TII, MI);
bool NeedComma = false;
bool DefsPushed = false;
if (NumDefs != 0 && !MI->isCall()) {
OS << " push";
NeedComma = true;
DefsPushed = true;
}
for (const MachineOperand &MO : MI->uses()) {
if (MO.isReg() && MO.isImplicit())
continue;
if (NeedComma)
OS << ',';
NeedComma = true;
OS << ' ';
switch (MO.getType()) {
default:
llvm_unreachable("unexpected machine operand type");
case MachineOperand::MO_Register:
OS << "(get_local " << regToString(MO) << ')';
break;
case MachineOperand::MO_Immediate:
OS << MO.getImm();
break;
case MachineOperand::MO_FPImmediate:
OS << toString(MO.getFPImm()->getValueAPF());
break;
case MachineOperand::MO_GlobalAddress:
OS << toSymbol(MO.getGlobal()->getName());
break;
case MachineOperand::MO_MachineBasicBlock:
OS << toSymbol(MO.getMBB()->getSymbol()->getName());
break;
}
if (NumDefs != 0 && !DefsPushed) {
// Special-case for calls; print the push after the callee.
assert(MI->isCall());
OS << ", push";
DefsPushed = true;
}
}
WebAssemblyMCInstLower MCInstLowering(OutContext, *this);
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);
EmitToStreamer(*OutStreamer, TmpInst);
break;
}
}
OutStreamer->EmitRawText(OS.str());
if (NumDefs != 0) {
SmallString<128> Str;
raw_svector_ostream OS(Str);
const MachineOperand &Operand = MI->getOperand(0);
OS << "\tset_local " << regToString(Operand) << ", pop";
OutStreamer->EmitRawText(OS.str());
}
}
static void ComputeLegalValueVTs(LLVMContext &Context,
@ -340,8 +231,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) {
if (Str.empty())
OS << "\t.imports\n";
OS << "\t.import " << toSymbol(F.getName()) << " \"\" \"" << F.getName()
<< "\"";
MCSymbol *Sym = OutStreamer->getContext().getOrCreateSymbol(F.getName());
OS << "\t.import " << *Sym << " \"\" " << *Sym;
const WebAssemblyTargetLowering &TLI =
*TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering();

12
llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
View File

@ -23,9 +23,11 @@ def : I<(outs), (ins i64imm:$amt1, i64imm:$amt2),
multiclass CALL<WebAssemblyRegClass vt> {
def CALL_#vt : I<(outs vt:$dst), (ins global:$callee, variable_ops),
[(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))]>;
[(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))],
"call $callee, $dst">;
def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
[(set vt:$dst, (WebAssemblycall1 I32:$callee))]>;
[(set vt:$dst, (WebAssemblycall1 I32:$callee))],
"call_indirect $callee, $dst">;
}
let Uses = [SP32, SP64], isCall = 1 in {
defm : CALL<I32>;
@ -34,9 +36,11 @@ let Uses = [SP32, SP64], isCall = 1 in {
defm : CALL<F64>;
def CALL_VOID : I<(outs), (ins global:$callee, variable_ops),
[(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))]>;
[(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))],
"call $callee">;
def CALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
[(WebAssemblycall0 I32:$callee)]>;
[(WebAssemblycall0 I32:$callee)],
"call_indirect $callee">;
} // Uses = [SP32,SP64], isCall = 1
/*

6
llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
View File

@ -41,9 +41,11 @@ def BR : I<(outs), (ins bb_op:$dst),
// currently.
let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
[(WebAssemblyswitch I32:$index)]>;
[(WebAssemblyswitch I32:$index)],
"switch $index">;
def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
[(WebAssemblyswitch I64:$index)]>;
[(WebAssemblyswitch I64:$index)],
"switch $index">;
} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
// Placemarkers to indicate the start of a block or loop scope.

29
llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
View File

@ -14,11 +14,13 @@
//===----------------------------------------------------------------------===//
#include "WebAssemblyMCInstLower.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/IR/Constants.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/IR/Constants.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
@ -55,25 +57,36 @@ void WebAssemblyMCInstLower::Lower(const MachineInstr *MI,
default:
MI->dump();
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
case MachineOperand::MO_Register: {
// Ignore all implicit register operands.
if (MO.isImplicit())
continue;
MCOp = MCOperand::createReg(MO.getReg());
// TODO: Handle physical registers.
const WebAssemblyFunctionInfo &MFI =
*MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
unsigned WAReg = MFI.getWAReg(MO.getReg());
MCOp = MCOperand::createReg(WAReg);
break;
}
case MachineOperand::MO_Immediate:
MCOp = MCOperand::createImm(MO.getImm());
break;
case MachineOperand::MO_FPImmediate:
MCOp = MCOperand::createFPImm(
MO.getFPImm()->getValueAPF().convertToDouble());
case MachineOperand::MO_FPImmediate: {
// TODO: MC converts all floating point immediate operands to double.
// This is fine for numeric values, but may cause NaNs to change bits.
const ConstantFP *Imm = MO.getFPImm();
if (Imm->getType()->isFloatTy())
MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToFloat());
else if (Imm->getType()->isDoubleTy())
MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToDouble());
else
llvm_unreachable("unknown floating point immediate type");
break;
}
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::createExpr(
MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
break;
case MachineOperand::MO_RegisterMask:
continue;
case MachineOperand::MO_GlobalAddress:
MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
break;

17
llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
View File

@ -30,9 +30,11 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
std::vector<MVT> Params;
std::vector<MVT> Results;
/// A mapping from CodeGen vreg index to WebAssembly register number.
std::vector<unsigned> WARegs;
public:
explicit WebAssemblyFunctionInfo(MachineFunction &MF)
: MF(MF) {}
explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
~WebAssemblyFunctionInfo() override;
void addParam(MVT VT) { Params.push_back(VT); }
@ -40,6 +42,17 @@ public:
void addResult(MVT VT) { Results.push_back(VT); }
const std::vector<MVT> &getResults() const { return Results; }
void initWARegs() {
assert(WARegs.empty());
WARegs.resize(MF.getRegInfo().getNumVirtRegs(), -1u);
}
void setWAReg(unsigned VReg, unsigned WAReg) {
WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
}
unsigned getWAReg(unsigned VReg) const {
return WARegs[TargetRegisterInfo::virtReg2Index(VReg)];
}
};
} // end namespace llvm

98
llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp Normal file
View File

@ -0,0 +1,98 @@
//===-- WebAssemblyRegNumbering.cpp - Register Numbering ------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file implements a pass which assigns WebAssembly register
/// numbers for CodeGen virtual registers.
///
//===----------------------------------------------------------------------===//
#include "WebAssembly.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "llvm/ADT/SCCIterator.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-reg-numbering"
namespace {
class WebAssemblyRegNumbering final : public MachineFunctionPass {
const char *getPassName() const override {
return "WebAssembly Register Numbering";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override;
public:
static char ID; // Pass identification, replacement for typeid
WebAssemblyRegNumbering() : MachineFunctionPass(ID) {}
};
} // end anonymous namespace
char WebAssemblyRegNumbering::ID = 0;
FunctionPass *llvm::createWebAssemblyRegNumbering() {
return new WebAssemblyRegNumbering();
}
bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) {
DEBUG(dbgs() << "********** Register Numbering **********\n"
"********** Function: "
<< MF.getName() << '\n');
WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
MachineRegisterInfo &MRI = MF.getRegInfo();
MFI.initWARegs();
// WebAssembly argument registers are in the same index space as local
// variables. Assign the numbers for them first.
for (MachineBasicBlock &MBB : MF) {
for (MachineInstr &MI : MBB) {
switch (MI.getOpcode()) {
case WebAssembly::ARGUMENT_I32:
case WebAssembly::ARGUMENT_I64:
case WebAssembly::ARGUMENT_F32:
case WebAssembly::ARGUMENT_F64:
MFI.setWAReg(MI.getOperand(0).getReg(), MI.getOperand(1).getImm());
break;
default:
break;
}
}
}
// Then assign regular WebAssembly registers for all remaining used
// virtual registers.
unsigned NumArgRegs = MFI.getParams().size();
unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
unsigned CurReg = 0;
for (unsigned VRegIdx = 0; VRegIdx < NumVRegs; ++VRegIdx) {
unsigned VReg = TargetRegisterInfo::index2VirtReg(VRegIdx);
// Skip unused registers.
if (MRI.use_empty(VReg))
continue;
if (MFI.getWAReg(VReg) == -1u)
MFI.setWAReg(VReg, NumArgRegs + CurReg++);
}
return true;
}

1
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
View File

@ -175,4 +175,5 @@ void WebAssemblyPassConfig::addPreSched2() {}
void WebAssemblyPassConfig::addPreEmitPass() {
addPass(createWebAssemblyCFGStackify());
addPass(createWebAssemblyRegNumbering());
}

54
llvm/test/CodeGen/WebAssembly/call.ll
View File

@ -16,8 +16,8 @@ declare void @void_nullary()
; CHECK-LABEL: call_i32_nullary:
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local i32
; CHECK-NEXT: call $i32_nullary, push{{$}}
; CHECK-NEXT: set_local 0, pop
; CHECK-NEXT: call i32_nullary, $push{{$}}
; CHECK-NEXT: set_local 0, $pop
; CHECK-NEXT: return (get_local 0)
define i32 @call_i32_nullary() {
%r = call i32 @i32_nullary()
@ -27,8 +27,8 @@ define i32 @call_i32_nullary() {
; CHECK-LABEL: call_i64_nullary:
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local i64
; CHECK-NEXT: call $i64_nullary, push{{$}}
; CHECK-NEXT: set_local 0, pop
; CHECK-NEXT: call i64_nullary, $push{{$}}
; CHECK-NEXT: set_local 0, $pop
; CHECK-NEXT: return (get_local 0)
define i64 @call_i64_nullary() {
%r = call i64 @i64_nullary()
@ -38,8 +38,8 @@ define i64 @call_i64_nullary() {
; CHECK-LABEL: call_float_nullary:
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local f32
; CHECK-NEXT: call $float_nullary, push{{$}}
; CHECK-NEXT: set_local 0, pop
; CHECK-NEXT: call float_nullary, $push{{$}}
; CHECK-NEXT: set_local 0, $pop
; CHECK-NEXT: return (get_local 0)
define float @call_float_nullary() {
%r = call float @float_nullary()
@ -49,8 +49,8 @@ define float @call_float_nullary() {
; CHECK-LABEL: call_double_nullary:
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local f64
; CHECK-NEXT: call $double_nullary, push{{$}}
; CHECK-NEXT: set_local 0, pop
; CHECK-NEXT: call double_nullary, $push{{$}}
; CHECK-NEXT: set_local 0, $pop
; CHECK-NEXT: return (get_local 0)
define double @call_double_nullary() {
%r = call double @double_nullary()
@ -58,7 +58,7 @@ define double @call_double_nullary() {
}
; CHECK-LABEL: call_void_nullary:
; CHECK-NEXT: call $void_nullary{{$}}
; CHECK-NEXT: call void_nullary{{$}}
; CHECK-NEXT: return
define void @call_void_nullary() {
call void @void_nullary()
@ -69,11 +69,9 @@ define void @call_void_nullary() {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local i32, i32
; CHECK-NEXT: get_local push, 0
; CHECK-NEXT: set_local 1, pop
; CHECK-NEXT: call $i32_unary, push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop
; CHECK-NEXT: return (get_local 2)
; CHECK-NEXT: call i32_unary, $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop
; CHECK-NEXT: return (get_local 1)
define i32 @call_i32_unary(i32 %a) {
%r = call i32 @i32_unary(i32 %a)
ret i32 %r
@ -84,13 +82,9 @@ define i32 @call_i32_unary(i32 %a) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local i32, i32, i32
; CHECK-NEXT: get_local push, 1
; CHECK-NEXT: set_local 2, pop
; CHECK-NEXT: get_local push, 0
; CHECK-NEXT: set_local 3, pop
; CHECK-NEXT: call $i32_binary, push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop
; CHECK-NEXT: return (get_local 4)
; CHECK-NEXT: call i32_binary, $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop
; CHECK-NEXT: return (get_local 2)
define i32 @call_i32_binary(i32 %a, i32 %b) {
%r = call i32 @i32_binary(i32 %a, i32 %b)
ret i32 %r
@ -99,9 +93,7 @@ define i32 @call_i32_binary(i32 %a, i32 %b) {
; CHECK-LABEL: call_indirect_void:
; CHECK-NEXT: .param i32
; CHECK-NEXT: .local i32
; CHECK-NEXT: get_local push, 0
; CHECK-NEXT: set_local 1, pop
; CHECK-NEXT: call_indirect (get_local 1){{$}}
; CHECK-NEXT: call_indirect (get_local 0){{$}}
; CHECK-NEXT: return
define void @call_indirect_void(void ()* %callee) {
call void %callee()
@ -112,18 +104,16 @@ define void @call_indirect_void(void ()* %callee) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local i32, i32
; CHECK-NEXT: get_local push, 0
; CHECK-NEXT: set_local 1, pop
; CHECK-NEXT: call_indirect (get_local 1), push{{$}}
; CHECK-NEXT: set_local 2, pop
; CHECK-NEXT: return (get_local 2)
; CHECK-NEXT: call_indirect (get_local 0), $push{{$}}
; CHECK-NEXT: set_local 1, $pop
; CHECK-NEXT: return (get_local 1)
define i32 @call_indirect_i32(i32 ()* %callee) {
%t = call i32 %callee()
ret i32 %t
}
; CHECK-LABEL: tail_call_void_nullary:
; CHECK-NEXT: call $void_nullary{{$}}
; CHECK-NEXT: call void_nullary{{$}}
; CHECK-NEXT: return{{$}}
define void @tail_call_void_nullary() {
tail call void @void_nullary()
@ -131,7 +121,7 @@ define void @tail_call_void_nullary() {
}
; CHECK-LABEL: fastcc_tail_call_void_nullary:
; CHECK-NEXT: call $void_nullary{{$}}
; CHECK-NEXT: call void_nullary{{$}}
; CHECK-NEXT: return{{$}}
define void @fastcc_tail_call_void_nullary() {
tail call fastcc void @void_nullary()
@ -139,7 +129,7 @@ define void @fastcc_tail_call_void_nullary() {
}
; CHECK-LABEL: coldcc_tail_call_void_nullary:
; CHECK-NEXT: call $void_nullary
; CHECK-NEXT: call void_nullary
; CHECK-NEXT: return{{$}}
define void @coldcc_tail_call_void_nullary() {
tail call coldcc void @void_nullary()

76
llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
View File

@ -14,7 +14,7 @@ declare void @something()
; CHECK: i32.add
; CHECK: br_if
; CHECK: call
; CHECK: br $BB0_1{{$}}
; CHECK: br BB0_1{{$}}
; CHECK: return{{$}}
define void @test0(i32 %n) {
entry:
@ -42,7 +42,7 @@ back:
; CHECK: i32.add
; CHECK: br_if
; CHECK: call
; CHECK: br $BB1_1{{$}}
; CHECK: br BB1_1{{$}}
; CHECK: return{{$}}
define void @test1(i32 %n) {
entry:
@ -66,10 +66,10 @@ back:
; Test that a simple loop is handled as expected.
; CHECK-LABEL: test2:
; CHECK: block $BB2_2{{$}}
; CHECK: br_if $BB2_2, {{.*}}
; CHECK: block BB2_2{{$}}
; CHECK: br_if BB2_2, {{.*}}
; CHECK: BB2_1:
; CHECK: br_if $BB2_1, (get_local 16){{$}}
; CHECK: br_if BB2_1, (get_local 10){{$}}
; CHECK: BB2_2:
; CHECK: return{{$}}
define void @test2(double* nocapture %p, i32 %n) {
@ -98,17 +98,17 @@ for.end:
}
; CHECK-LABEL: doublediamond:
; CHECK: block $BB3_5{{$}}
; CHECK: block $BB3_4{{$}}
; CHECK: block $BB3_2{{$}}
; CHECK: br_if $BB3_2, (get_local 7){{$}}
; CHECK: br $BB3_5{{$}}
; CHECK: block BB3_5{{$}}
; CHECK: block BB3_4{{$}}
; CHECK: block BB3_2{{$}}
; CHECK: br_if BB3_2, (get_local 4){{$}}
; CHECK: br BB3_5{{$}}
; CHECK: BB3_2:
; CHECK: br_if $BB3_4, (get_local 10){{$}}
; CHECK: br $BB3_5{{$}}
; CHECK: br_if BB3_4, (get_local 6){{$}}
; CHECK: br BB3_5{{$}}
; CHECK: BB3_4:
; CHECK: BB3_5:
; CHECK: return (get_local 6){{$}}
; CHECK: return (get_local 3){{$}}
define i32 @doublediamond(i32 %a, i32 %b, i32* %p) {
entry:
%c = icmp eq i32 %a, 0
@ -133,10 +133,10 @@ exit:
}
; CHECK-LABEL: triangle:
; CHECK: block $BB4_2{{$}}
; CHECK: br_if $BB4_2, (get_local 5){{$}}
; CHECK: block BB4_2{{$}}
; CHECK: br_if BB4_2, (get_local 3){{$}}
; CHECK: BB4_2:
; CHECK: return (get_local 4){{$}}
; CHECK: return (get_local 2){{$}}
define i32 @triangle(i32* %p, i32 %a) {
entry:
%c = icmp eq i32 %a, 0
@ -151,13 +151,13 @@ exit:
}
; CHECK-LABEL: diamond:
; CHECK: block $BB5_3{{$}}
; CHECK: block $BB5_2{{$}}
; CHECK: br_if $BB5_2, (get_local 5){{$}}
; CHECK: br $BB5_3{{$}}
; CHECK: block BB5_3{{$}}
; CHECK: block BB5_2{{$}}
; CHECK: br_if BB5_2, (get_local 3){{$}}
; CHECK: br BB5_3{{$}}
; CHECK: BB5_2:
; CHECK: BB5_3:
; CHECK: return (get_local 4){{$}}
; CHECK: return (get_local 2){{$}}
define i32 @diamond(i32* %p, i32 %a) {
entry:
%c = icmp eq i32 %a, 0
@ -176,7 +176,7 @@ exit:
; CHECK-LABEL: single_block:
; CHECK-NOT: br
; CHECK: return (get_local 2){{$}}
; CHECK: return (get_local 1){{$}}
define i32 @single_block(i32* %p) {
entry:
store volatile i32 0, i32* %p
@ -186,8 +186,8 @@ entry:
; CHECK-LABEL: minimal_loop:
; CHECK-NOT: br
; CHECK: BB7_1:
; CHECK: i32.store (get_local 1), (get_local 3){{$}}
; CHECK: br $BB7_1{{$}}
; CHECK: i32.store (get_local 0), (get_local 2){{$}}
; CHECK: br BB7_1{{$}}
define i32 @minimal_loop(i32* %p) {
entry:
store volatile i32 0, i32* %p
@ -200,9 +200,9 @@ loop:
; CHECK-LABEL: simple_loop:
; CHECK-NOT: br
; CHECK: BB8_1:
; CHECK: loop $BB8_2{{$}}
; CHECK: br_if $BB8_1, (get_local 6){{$}}
; CHECK: return (get_local 4){{$}}
; CHECK: loop BB8_2{{$}}
; CHECK: br_if BB8_1, (get_local 3){{$}}
; CHECK: return (get_local 2){{$}}
define i32 @simple_loop(i32* %p, i32 %a) {
entry:
%c = icmp eq i32 %a, 0
@ -217,13 +217,13 @@ exit:
}
; CHECK-LABEL: doubletriangle:
; CHECK: block $BB9_4{{$}}
; CHECK: block $BB9_3{{$}}
; CHECK: br_if $BB9_4, (get_local 7){{$}}
; CHECK: br_if $BB9_3, (get_local 10){{$}}
; CHECK: block BB9_4{{$}}
; CHECK: block BB9_3{{$}}
; CHECK: br_if BB9_4, (get_local 4){{$}}
; CHECK: br_if BB9_3, (get_local 6){{$}}
; CHECK: BB9_3:
; CHECK: BB9_4:
; CHECK: return (get_local 6){{$}}
; CHECK: return (get_local 3){{$}}
define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) {
entry:
%c = icmp eq i32 %a, 0
@ -245,14 +245,14 @@ exit:
}
; CHECK-LABEL: ifelse_earlyexits:
; CHECK: block $BB10_4{{$}}
; CHECK: block $BB10_2{{$}}
; CHECK: br_if $BB10_2, (get_local 7){{$}}
; CHECK: br $BB10_4{{$}}
; CHECK: block BB10_4{{$}}
; CHECK: block BB10_2{{$}}
; CHECK: br_if BB10_2, (get_local 4){{$}}
; CHECK: br BB10_4{{$}}
; CHECK: BB10_2:
; CHECK: br_if $BB10_4, (get_local 10){{$}}
; CHECK: br_if BB10_4, (get_local 6){{$}}
; CHECK: BB10_4:
; CHECK: return (get_local 6){{$}}
; CHECK: return (get_local 3){{$}}
define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
entry:
%c = icmp eq i32 %a, 0

112
llvm/test/CodeGen/WebAssembly/comparisons_f32.ll
View File

@ -11,17 +11,13 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f32, f32, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.eq push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f32.eq push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i32.and push, (get_local 5), (get_local 4){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
; CHECK-NEXT: f32.eq $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f32.eq $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i32.and $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i32 @ord_f32(float %x, float %y) {
%a = fcmp ord float %x, %y
%b = zext i1 %a to i32
@ -33,17 +29,13 @@ define i32 @ord_f32(float %x, float %y) {
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f32, f32, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.ne push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f32.ne push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 5), (get_local 4){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
; CHECK-NEXT: f32.ne $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f32.ne $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i32 @uno_f32(float %x, float %y) {
%a = fcmp uno float %x, %y
%b = zext i1 %a to i32
@ -55,13 +47,9 @@ define i32 @uno_f32(float %x, float %y) {
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f32, f32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: f32.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @oeq_f32(float %x, float %y) {
%a = fcmp oeq float %x, %y
%b = zext i1 %a to i32
@ -69,8 +57,8 @@ define i32 @oeq_f32(float %x, float %y) {
}
; CHECK-LABEL: une_f32:
; CHECK: f32.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @une_f32(float %x, float %y) {
%a = fcmp une float %x, %y
%b = zext i1 %a to i32
@ -78,8 +66,8 @@ define i32 @une_f32(float %x, float %y) {
}
; CHECK-LABEL: olt_f32:
; CHECK: f32.lt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.lt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @olt_f32(float %x, float %y) {
%a = fcmp olt float %x, %y
%b = zext i1 %a to i32
@ -87,8 +75,8 @@ define i32 @olt_f32(float %x, float %y) {
}
; CHECK-LABEL: ole_f32:
; CHECK: f32.le push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.le $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ole_f32(float %x, float %y) {
%a = fcmp ole float %x, %y
%b = zext i1 %a to i32
@ -96,8 +84,8 @@ define i32 @ole_f32(float %x, float %y) {
}
; CHECK-LABEL: ogt_f32:
; CHECK: f32.gt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.gt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ogt_f32(float %x, float %y) {
%a = fcmp ogt float %x, %y
%b = zext i1 %a to i32
@ -105,8 +93,8 @@ define i32 @ogt_f32(float %x, float %y) {
}
; CHECK-LABEL: oge_f32:
; CHECK: f32.ge push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.ge $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @oge_f32(float %x, float %y) {
%a = fcmp oge float %x, %y
%b = zext i1 %a to i32
@ -120,21 +108,17 @@ define i32 @oge_f32(float %x, float %y) {
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f32, f32, i32, i32, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f32.ne push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: f32.ne push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 6), (get_local 5){{$}}
; CHECK-NEXT: set_local 7, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 4), (get_local 7){{$}}
; CHECK-NEXT: set_local 8, pop{{$}}
; CHECK-NEXT: return (get_local 8){{$}}
; CHECK-NEXT: f32.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f32.ne $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: f32.ne $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 4), (get_local 3){{$}}
; CHECK-NEXT: set_local 5, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 2), (get_local 5){{$}}
; CHECK-NEXT: set_local 6, $pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
define i32 @ueq_f32(float %x, float %y) {
%a = fcmp ueq float %x, %y
%b = zext i1 %a to i32
@ -142,8 +126,8 @@ define i32 @ueq_f32(float %x, float %y) {
}
; CHECK-LABEL: one_f32:
; CHECK: f32.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @one_f32(float %x, float %y) {
%a = fcmp one float %x, %y
%b = zext i1 %a to i32
@ -151,8 +135,8 @@ define i32 @one_f32(float %x, float %y) {
}
; CHECK-LABEL: ult_f32:
; CHECK: f32.lt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.lt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ult_f32(float %x, float %y) {
%a = fcmp ult float %x, %y
%b = zext i1 %a to i32
@ -160,8 +144,8 @@ define i32 @ult_f32(float %x, float %y) {
}
; CHECK-LABEL: ule_f32:
; CHECK: f32.le push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.le $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ule_f32(float %x, float %y) {
%a = fcmp ule float %x, %y
%b = zext i1 %a to i32
@ -169,8 +153,8 @@ define i32 @ule_f32(float %x, float %y) {
}
; CHECK-LABEL: ugt_f32:
; CHECK: f32.gt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.gt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ugt_f32(float %x, float %y) {
%a = fcmp ugt float %x, %y
%b = zext i1 %a to i32
@ -178,8 +162,8 @@ define i32 @ugt_f32(float %x, float %y) {
}
; CHECK-LABEL: uge_f32:
; CHECK: f32.ge push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.ge $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @uge_f32(float %x, float %y) {
%a = fcmp uge float %x, %y
%b = zext i1 %a to i32

112
llvm/test/CodeGen/WebAssembly/comparisons_f64.ll
View File

@ -11,17 +11,13 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f64, f64, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.eq push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f64.eq push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i32.and push, (get_local 5), (get_local 4){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
; CHECK-NEXT: f64.eq $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f64.eq $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i32.and $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i32 @ord_f64(double %x, double %y) {
%a = fcmp ord double %x, %y
%b = zext i1 %a to i32
@ -33,17 +29,13 @@ define i32 @ord_f64(double %x, double %y) {
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f64, f64, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.ne push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f64.ne push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 5), (get_local 4){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
; CHECK-NEXT: f64.ne $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f64.ne $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i32 @uno_f64(double %x, double %y) {
%a = fcmp uno double %x, %y
%b = zext i1 %a to i32
@ -55,13 +47,9 @@ define i32 @uno_f64(double %x, double %y) {
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f64, f64, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: f64.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @oeq_f64(double %x, double %y) {
%a = fcmp oeq double %x, %y
%b = zext i1 %a to i32
@ -69,8 +57,8 @@ define i32 @oeq_f64(double %x, double %y) {
}
; CHECK-LABEL: une_f64:
; CHECK: f64.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @une_f64(double %x, double %y) {
%a = fcmp une double %x, %y
%b = zext i1 %a to i32
@ -78,8 +66,8 @@ define i32 @une_f64(double %x, double %y) {
}
; CHECK-LABEL: olt_f64:
; CHECK: f64.lt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.lt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @olt_f64(double %x, double %y) {
%a = fcmp olt double %x, %y
%b = zext i1 %a to i32
@ -87,8 +75,8 @@ define i32 @olt_f64(double %x, double %y) {
}
; CHECK-LABEL: ole_f64:
; CHECK: f64.le push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.le $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ole_f64(double %x, double %y) {
%a = fcmp ole double %x, %y
%b = zext i1 %a to i32
@ -96,8 +84,8 @@ define i32 @ole_f64(double %x, double %y) {
}
; CHECK-LABEL: ogt_f64:
; CHECK: f64.gt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.gt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ogt_f64(double %x, double %y) {
%a = fcmp ogt double %x, %y
%b = zext i1 %a to i32
@ -105,8 +93,8 @@ define i32 @ogt_f64(double %x, double %y) {
}
; CHECK-LABEL: oge_f64:
; CHECK: f64.ge push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.ge $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @oge_f64(double %x, double %y) {
%a = fcmp oge double %x, %y
%b = zext i1 %a to i32
@ -120,21 +108,17 @@ define i32 @oge_f64(double %x, double %y) {
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local f64, f64, i32, i32, i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: f64.ne push, (get_local 2), (get_local 2){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: f64.ne push, (get_local 3), (get_local 3){{$}}
; CHECK-NEXT: set_local 6, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 6), (get_local 5){{$}}
; CHECK-NEXT: set_local 7, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 4), (get_local 7){{$}}
; CHECK-NEXT: set_local 8, pop{{$}}
; CHECK-NEXT: return (get_local 8){{$}}
; CHECK-NEXT: f64.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: f64.ne $push, (get_local 1), (get_local 1){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: f64.ne $push, (get_local 0), (get_local 0){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 4), (get_local 3){{$}}
; CHECK-NEXT: set_local 5, $pop{{$}}
; CHECK-NEXT: i32.or $push, (get_local 2), (get_local 5){{$}}
; CHECK-NEXT: set_local 6, $pop{{$}}
; CHECK-NEXT: return (get_local 6){{$}}
define i32 @ueq_f64(double %x, double %y) {
%a = fcmp ueq double %x, %y
%b = zext i1 %a to i32
@ -142,8 +126,8 @@ define i32 @ueq_f64(double %x, double %y) {
}
; CHECK-LABEL: one_f64:
; CHECK: f64.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @one_f64(double %x, double %y) {
%a = fcmp one double %x, %y
%b = zext i1 %a to i32
@ -151,8 +135,8 @@ define i32 @one_f64(double %x, double %y) {
}
; CHECK-LABEL: ult_f64:
; CHECK: f64.lt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.lt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ult_f64(double %x, double %y) {
%a = fcmp ult double %x, %y
%b = zext i1 %a to i32
@ -160,8 +144,8 @@ define i32 @ult_f64(double %x, double %y) {
}
; CHECK-LABEL: ule_f64:
; CHECK: f64.le push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.le $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ule_f64(double %x, double %y) {
%a = fcmp ule double %x, %y
%b = zext i1 %a to i32
@ -169,8 +153,8 @@ define i32 @ule_f64(double %x, double %y) {
}
; CHECK-LABEL: ugt_f64:
; CHECK: f64.gt push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.gt $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ugt_f64(double %x, double %y) {
%a = fcmp ugt double %x, %y
%b = zext i1 %a to i32
@ -178,8 +162,8 @@ define i32 @ugt_f64(double %x, double %y) {
}
; CHECK-LABEL: uge_f64:
; CHECK: f64.ge push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.ge $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @uge_f64(double %x, double %y) {
%a = fcmp uge double %x, %y
%b = zext i1 %a to i32

46
llvm/test/CodeGen/WebAssembly/comparisons_i32.ll
View File

@ -10,13 +10,9 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @eq_i32(i32 %x, i32 %y) {
%a = icmp eq i32 %x, %y
%b = zext i1 %a to i32
@ -24,8 +20,8 @@ define i32 @eq_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: ne_i32:
; CHECK: i32.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ne_i32(i32 %x, i32 %y) {
%a = icmp ne i32 %x, %y
%b = zext i1 %a to i32
@ -33,8 +29,8 @@ define i32 @ne_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: slt_i32:
; CHECK: i32.lt_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.lt_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @slt_i32(i32 %x, i32 %y) {
%a = icmp slt i32 %x, %y
%b = zext i1 %a to i32
@ -42,8 +38,8 @@ define i32 @slt_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sle_i32:
; CHECK: i32.le_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.le_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sle_i32(i32 %x, i32 %y) {
%a = icmp sle i32 %x, %y
%b = zext i1 %a to i32
@ -51,8 +47,8 @@ define i32 @sle_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: ult_i32:
; CHECK: i32.lt_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.lt_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ult_i32(i32 %x, i32 %y) {
%a = icmp ult i32 %x, %y
%b = zext i1 %a to i32
@ -60,8 +56,8 @@ define i32 @ult_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: ule_i32:
; CHECK: i32.le_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.le_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ule_i32(i32 %x, i32 %y) {
%a = icmp ule i32 %x, %y
%b = zext i1 %a to i32
@ -69,8 +65,8 @@ define i32 @ule_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sgt_i32:
; CHECK: i32.gt_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.gt_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sgt_i32(i32 %x, i32 %y) {
%a = icmp sgt i32 %x, %y
%b = zext i1 %a to i32
@ -78,8 +74,8 @@ define i32 @sgt_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sge_i32:
; CHECK: i32.ge_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.ge_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sge_i32(i32 %x, i32 %y) {
%a = icmp sge i32 %x, %y
%b = zext i1 %a to i32
@ -87,8 +83,8 @@ define i32 @sge_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: ugt_i32:
; CHECK: i32.gt_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.gt_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ugt_i32(i32 %x, i32 %y) {
%a = icmp ugt i32 %x, %y
%b = zext i1 %a to i32
@ -96,8 +92,8 @@ define i32 @ugt_i32(i32 %x, i32 %y) {
}
; CHECK-LABEL: uge_i32:
; CHECK: i32.ge_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i32.ge_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @uge_i32(i32 %x, i32 %y) {
%a = icmp uge i32 %x, %y
%b = zext i1 %a to i32

46
llvm/test/CodeGen/WebAssembly/comparisons_i64.ll
View File

@ -10,13 +10,9 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i64, i64, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.eq push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.eq $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @eq_i64(i64 %x, i64 %y) {
%a = icmp eq i64 %x, %y
%b = zext i1 %a to i32
@ -24,8 +20,8 @@ define i32 @eq_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: ne_i64:
; CHECK: i64.ne push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.ne $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ne_i64(i64 %x, i64 %y) {
%a = icmp ne i64 %x, %y
%b = zext i1 %a to i32
@ -33,8 +29,8 @@ define i32 @ne_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: slt_i64:
; CHECK: i64.lt_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.lt_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @slt_i64(i64 %x, i64 %y) {
%a = icmp slt i64 %x, %y
%b = zext i1 %a to i32
@ -42,8 +38,8 @@ define i32 @slt_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sle_i64:
; CHECK: i64.le_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.le_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sle_i64(i64 %x, i64 %y) {
%a = icmp sle i64 %x, %y
%b = zext i1 %a to i32
@ -51,8 +47,8 @@ define i32 @sle_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: ult_i64:
; CHECK: i64.lt_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.lt_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ult_i64(i64 %x, i64 %y) {
%a = icmp ult i64 %x, %y
%b = zext i1 %a to i32
@ -60,8 +56,8 @@ define i32 @ult_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: ule_i64:
; CHECK: i64.le_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.le_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ule_i64(i64 %x, i64 %y) {
%a = icmp ule i64 %x, %y
%b = zext i1 %a to i32
@ -69,8 +65,8 @@ define i32 @ule_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sgt_i64:
; CHECK: i64.gt_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.gt_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sgt_i64(i64 %x, i64 %y) {
%a = icmp sgt i64 %x, %y
%b = zext i1 %a to i32
@ -78,8 +74,8 @@ define i32 @sgt_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sge_i64:
; CHECK: i64.ge_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.ge_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @sge_i64(i64 %x, i64 %y) {
%a = icmp sge i64 %x, %y
%b = zext i1 %a to i32
@ -87,8 +83,8 @@ define i32 @sge_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: ugt_i64:
; CHECK: i64.gt_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.gt_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @ugt_i64(i64 %x, i64 %y) {
%a = icmp ugt i64 %x, %y
%b = zext i1 %a to i32
@ -96,8 +92,8 @@ define i32 @ugt_i64(i64 %x, i64 %y) {
}
; CHECK-LABEL: uge_i64:
; CHECK: i64.ge_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: i64.ge_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define i32 @uge_i64(i64 %x, i64 %y) {
%a = icmp uge i64 %x, %y
%b = zext i1 %a to i32

168
llvm/test/CodeGen/WebAssembly/conv.ll
View File

@ -9,11 +9,9 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i64, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.wrap/i64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.wrap/i64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @i32_wrap_i64(i64 %x) {
%a = trunc i64 %x to i32
ret i32 %a
@ -23,11 +21,9 @@ define i32 @i32_wrap_i64(i64 %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local i32, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.extend_s/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.extend_s/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_extend_s_i32(i32 %x) {
%a = sext i32 %x to i64
ret i64 %a
@ -37,11 +33,9 @@ define i64 @i64_extend_s_i32(i32 %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local i32, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.extend_u/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.extend_u/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_extend_u_i32(i32 %x) {
%a = zext i32 %x to i64
ret i64 %a
@ -51,11 +45,9 @@ define i64 @i64_extend_u_i32(i32 %x) {
; CHECK-NEXT: .param f32
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local f32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.trunc_s/f32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.trunc_s/f32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @i32_trunc_s_f32(float %x) {
%a = fptosi float %x to i32
ret i32 %a
@ -65,11 +57,9 @@ define i32 @i32_trunc_s_f32(float %x) {
; CHECK-NEXT: .param f32
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local f32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.trunc_u/f32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.trunc_u/f32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @i32_trunc_u_f32(float %x) {
%a = fptoui float %x to i32
ret i32 %a
@ -79,11 +69,9 @@ define i32 @i32_trunc_u_f32(float %x) {
; CHECK-NEXT: .param f64
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local f64, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.trunc_s/f64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.trunc_s/f64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @i32_trunc_s_f64(double %x) {
%a = fptosi double %x to i32
ret i32 %a
@ -93,11 +81,9 @@ define i32 @i32_trunc_s_f64(double %x) {
; CHECK-NEXT: .param f64
; CHECK-NEXT: .result i32
; CHECK-NEXT: .local f64, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.trunc_u/f64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.trunc_u/f64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @i32_trunc_u_f64(double %x) {
%a = fptoui double %x to i32
ret i32 %a
@ -107,11 +93,9 @@ define i32 @i32_trunc_u_f64(double %x) {
; CHECK-NEXT: .param f32
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local f32, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.trunc_s/f32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.trunc_s/f32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_trunc_s_f32(float %x) {
%a = fptosi float %x to i64
ret i64 %a
@ -121,11 +105,9 @@ define i64 @i64_trunc_s_f32(float %x) {
; CHECK-NEXT: .param f32
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local f32, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.trunc_u/f32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.trunc_u/f32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_trunc_u_f32(float %x) {
%a = fptoui float %x to i64
ret i64 %a
@ -135,11 +117,9 @@ define i64 @i64_trunc_u_f32(float %x) {
; CHECK-NEXT: .param f64
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local f64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.trunc_s/f64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.trunc_s/f64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_trunc_s_f64(double %x) {
%a = fptosi double %x to i64
ret i64 %a
@ -149,11 +129,9 @@ define i64 @i64_trunc_s_f64(double %x) {
; CHECK-NEXT: .param f64
; CHECK-NEXT: .result i64
; CHECK-NEXT: .local f64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.trunc_u/f64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.trunc_u/f64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @i64_trunc_u_f64(double %x) {
%a = fptoui double %x to i64
ret i64 %a
@ -163,11 +141,9 @@ define i64 @i64_trunc_u_f64(double %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local i32, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.convert_s/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.convert_s/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @f32_convert_s_i32(i32 %x) {
%a = sitofp i32 %x to float
ret float %a
@ -177,11 +153,9 @@ define float @f32_convert_s_i32(i32 %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local i32, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.convert_u/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.convert_u/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @f32_convert_u_i32(i32 %x) {
%a = uitofp i32 %x to float
ret float %a
@ -191,11 +165,9 @@ define float @f32_convert_u_i32(i32 %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local i32, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.convert_s/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.convert_s/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @f64_convert_s_i32(i32 %x) {
%a = sitofp i32 %x to double
ret double %a
@ -205,11 +177,9 @@ define double @f64_convert_s_i32(i32 %x) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local i32, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.convert_u/i32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.convert_u/i32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @f64_convert_u_i32(i32 %x) {
%a = uitofp i32 %x to double
ret double %a
@ -219,11 +189,9 @@ define double @f64_convert_u_i32(i32 %x) {
; CHECK-NEXT: .param i64
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local i64, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.convert_s/i64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.convert_s/i64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @f32_convert_s_i64(i64 %x) {
%a = sitofp i64 %x to float
ret float %a
@ -233,11 +201,9 @@ define float @f32_convert_s_i64(i64 %x) {
; CHECK-NEXT: .param i64
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local i64, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.convert_u/i64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.convert_u/i64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @f32_convert_u_i64(i64 %x) {
%a = uitofp i64 %x to float
ret float %a
@ -247,11 +213,9 @@ define float @f32_convert_u_i64(i64 %x) {
; CHECK-NEXT: .param i64
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local i64, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.convert_s/i64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.convert_s/i64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @f64_convert_s_i64(i64 %x) {
%a = sitofp i64 %x to double
ret double %a
@ -261,11 +225,9 @@ define double @f64_convert_s_i64(i64 %x) {
; CHECK-NEXT: .param i64
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local i64, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.convert_u/i64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.convert_u/i64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @f64_convert_u_i64(i64 %x) {
%a = uitofp i64 %x to double
ret double %a
@ -275,11 +237,9 @@ define double @f64_convert_u_i64(i64 %x) {
; CHECK-NEXT: .param f32
; CHECK-NEXT: .result f64
; CHECK-NEXT: .local f32, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.promote/f32 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.promote/f32 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @f64_promote_f32(float %x) {
%a = fpext float %x to double
ret double %a
@ -289,11 +249,9 @@ define double @f64_promote_f32(float %x) {
; CHECK-NEXT: .param f64
; CHECK-NEXT: .result f32
; CHECK-NEXT: .local f64, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.demote/f64 push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.demote/f64 $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @f32_demote_f64(double %x) {
%a = fptrunc double %x to float
ret float %a

9
llvm/test/CodeGen/WebAssembly/dead-vreg.ll
View File

@ -1,11 +1,6 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Check that unused vregs don't prevent locals from being numbered wrong.
;
; The test currently checks that the dead virtual registers still appear as
; locals, which isn't what we want long term. Removing them from the list of
; locals will require remapping the local numbers, and checking that the
; get_/set_local have the right numbers.
; Check that unused vregs aren't assigned registers.
target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@ -15,7 +10,7 @@ define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
; CHECK-NEXT: .param i32
; CHECK-NEXT: .param i32
; CHECK-NEXT: .param i32
; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
entry:
%cmp.19 = icmp sgt i32 %h, 0
br i1 %cmp.19, label %for.cond.1.preheader.lr.ph, label %for.end.7

66
llvm/test/CodeGen/WebAssembly/f32.ll
View File

@ -19,109 +19,105 @@ declare float @llvm.rint.f32(float)
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local f32, f32, f32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.add push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: f32.add $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define float @fadd32(float %x, float %y) {
%a = fadd float %x, %y
ret float %a
}
; CHECK-LABEL: fsub32:
; CHECK: f32.sub push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.sub $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @fsub32(float %x, float %y) {
%a = fsub float %x, %y
ret float %a
}
; CHECK-LABEL: fmul32:
; CHECK: f32.mul push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.mul $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @fmul32(float %x, float %y) {
%a = fmul float %x, %y
ret float %a
}
; CHECK-LABEL: fdiv32:
; CHECK: f32.div push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.div $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @fdiv32(float %x, float %y) {
%a = fdiv float %x, %y
ret float %a
}
; CHECK-LABEL: fabs32:
; CHECK: f32.abs push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.abs $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @fabs32(float %x) {
%a = call float @llvm.fabs.f32(float %x)
ret float %a
}
; CHECK-LABEL: fneg32:
; CHECK: f32.neg push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.neg $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @fneg32(float %x) {
%a = fsub float -0., %x
ret float %a
}
; CHECK-LABEL: copysign32:
; CHECK: f32.copysign push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f32.copysign $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @copysign32(float %x, float %y) {
%a = call float @llvm.copysign.f32(float %x, float %y)
ret float %a
}
; CHECK-LABEL: sqrt32:
; CHECK: f32.sqrt push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.sqrt $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @sqrt32(float %x) {
%a = call float @llvm.sqrt.f32(float %x)
ret float %a
}
; CHECK-LABEL: ceil32:
; CHECK: f32.ceil push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.ceil $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @ceil32(float %x) {
%a = call float @llvm.ceil.f32(float %x)
ret float %a
}
; CHECK-LABEL: floor32:
; CHECK: f32.floor push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.floor $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @floor32(float %x) {
%a = call float @llvm.floor.f32(float %x)
ret float %a
}
; CHECK-LABEL: trunc32:
; CHECK: f32.trunc push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.trunc $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @trunc32(float %x) {
%a = call float @llvm.trunc.f32(float %x)
ret float %a
}
; CHECK-LABEL: nearest32:
; CHECK: f32.nearest push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.nearest $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @nearest32(float %x) {
%a = call float @llvm.nearbyint.f32(float %x)
ret float %a
}
; CHECK-LABEL: nearest32_via_rint:
; CHECK: f32.nearest push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f32.nearest $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define float @nearest32_via_rint(float %x) {
%a = call float @llvm.rint.f32(float %x)
ret float %a
@ -134,8 +130,8 @@ define float @nearest32_via_rint(float %x) {
; tests.
; CHECK-LABEL: fmin32:
; CHECK: f32.min push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK: f32.min $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @fmin32(float %x) {
%a = fcmp ult float %x, 0.0
%b = select i1 %a, float %x, float 0.0
@ -143,8 +139,8 @@ define float @fmin32(float %x) {
}
; CHECK-LABEL: fmax32:
; CHECK: f32.max push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK: f32.max $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define float @fmax32(float %x) {
%a = fcmp ugt float %x, 0.0
%b = select i1 %a, float %x, float 0.0

66
llvm/test/CodeGen/WebAssembly/f64.ll
View File

@ -19,109 +19,105 @@ declare double @llvm.rint.f64(double)
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local f64, f64, f64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.add push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: f64.add $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define double @fadd64(double %x, double %y) {
%a = fadd double %x, %y
ret double %a
}
; CHECK-LABEL: fsub64:
; CHECK: f64.sub push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.sub $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @fsub64(double %x, double %y) {
%a = fsub double %x, %y
ret double %a
}
; CHECK-LABEL: fmul64:
; CHECK: f64.mul push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.mul $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @fmul64(double %x, double %y) {
%a = fmul double %x, %y
ret double %a
}
; CHECK-LABEL: fdiv64:
; CHECK: f64.div push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.div $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @fdiv64(double %x, double %y) {
%a = fdiv double %x, %y
ret double %a
}
; CHECK-LABEL: fabs64:
; CHECK: f64.abs push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.abs $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @fabs64(double %x) {
%a = call double @llvm.fabs.f64(double %x)
ret double %a
}
; CHECK-LABEL: fneg64:
; CHECK: f64.neg push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.neg $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @fneg64(double %x) {
%a = fsub double -0., %x
ret double %a
}
; CHECK-LABEL: copysign64:
; CHECK: f64.copysign push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK: f64.copysign $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @copysign64(double %x, double %y) {
%a = call double @llvm.copysign.f64(double %x, double %y)
ret double %a
}
; CHECK-LABEL: sqrt64:
; CHECK: f64.sqrt push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.sqrt $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @sqrt64(double %x) {
%a = call double @llvm.sqrt.f64(double %x)
ret double %a
}
; CHECK-LABEL: ceil64:
; CHECK: f64.ceil push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.ceil $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @ceil64(double %x) {
%a = call double @llvm.ceil.f64(double %x)
ret double %a
}
; CHECK-LABEL: floor64:
; CHECK: f64.floor push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.floor $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @floor64(double %x) {
%a = call double @llvm.floor.f64(double %x)
ret double %a
}
; CHECK-LABEL: trunc64:
; CHECK: f64.trunc push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.trunc $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @trunc64(double %x) {
%a = call double @llvm.trunc.f64(double %x)
ret double %a
}
; CHECK-LABEL: nearest64:
; CHECK: f64.nearest push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.nearest $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @nearest64(double %x) {
%a = call double @llvm.nearbyint.f64(double %x)
ret double %a
}
; CHECK-LABEL: nearest64_via_rint:
; CHECK: f64.nearest push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: f64.nearest $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define double @nearest64_via_rint(double %x) {
%a = call double @llvm.rint.f64(double %x)
ret double %a
@ -134,8 +130,8 @@ define double @nearest64_via_rint(double %x) {
; tests.
; CHECK-LABEL: fmin64:
; CHECK: f64.min push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK: f64.min $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @fmin64(double %x) {
%a = fcmp ult double %x, 0.0
%b = select i1 %a, double %x, double 0.0
@ -143,8 +139,8 @@ define double @fmin64(double %x) {
}
; CHECK-LABEL: fmax64:
; CHECK: f64.max push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK: f64.max $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
define double @fmax64(double %x) {
%a = fcmp ugt double %x, 0.0
%b = select i1 %a, double %x, double 0.0

4
llvm/test/CodeGen/WebAssembly/fast-isel.ll
View File

@ -8,13 +8,13 @@ target triple = "wasm32-unknown-unknown"
; This tests very minimal fast-isel functionality.
; CHECK-LABEL: immediate_f32:
; CHECK: f32.const push, 0x1.4p1{{$}}
; CHECK: f32.const $push, 0x1.4p1{{$}}
define float @immediate_f32() {
ret float 2.5
}
; CHECK-LABEL: immediate_f64:
; CHECK: f64.const push, 0x1.4p1{{$}}
; CHECK: f64.const $push, 0x1.4p1{{$}}
define double @immediate_f64() {
ret double 2.5
}

8
llvm/test/CodeGen/WebAssembly/func.ll
View File

@ -15,8 +15,8 @@ define void @f0() {
; CHECK-LABEL: f1:
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: i32.const push, 0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i32.const $push, 0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
; CHECK: .size f1,
define i32 @f1() {
@ -28,8 +28,8 @@ define i32 @f1() {
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: i32.const push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: i32.const $push, 0{{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK: .size f2,
define i32 @f2(i32 %p1, float %p2) {

170
llvm/test/CodeGen/WebAssembly/i32.ll
View File

@ -14,13 +14,9 @@ declare i32 @llvm.ctpop.i32(i32)
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.add push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.add $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @add32(i32 %x, i32 %y) {
%a = add i32 %x, %y
ret i32 %a
@ -31,13 +27,9 @@ define i32 @add32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.sub push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.sub $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @sub32(i32 %x, i32 %y) {
%a = sub i32 %x, %y
ret i32 %a
@ -48,13 +40,9 @@ define i32 @sub32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.mul push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.mul $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @mul32(i32 %x, i32 %y) {
%a = mul i32 %x, %y
ret i32 %a
@ -65,13 +53,9 @@ define i32 @mul32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.div_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.div_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @sdiv32(i32 %x, i32 %y) {
%a = sdiv i32 %x, %y
ret i32 %a
@ -82,13 +66,9 @@ define i32 @sdiv32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.div_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.div_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @udiv32(i32 %x, i32 %y) {
%a = udiv i32 %x, %y
ret i32 %a
@ -99,13 +79,9 @@ define i32 @udiv32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.rem_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.rem_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @srem32(i32 %x, i32 %y) {
%a = srem i32 %x, %y
ret i32 %a
@ -116,13 +92,9 @@ define i32 @srem32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.rem_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.rem_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @urem32(i32 %x, i32 %y) {
%a = urem i32 %x, %y
ret i32 %a
@ -133,13 +105,9 @@ define i32 @urem32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.and push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.and $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @and32(i32 %x, i32 %y) {
%a = and i32 %x, %y
ret i32 %a
@ -150,13 +118,9 @@ define i32 @and32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.or push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.or $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @or32(i32 %x, i32 %y) {
%a = or i32 %x, %y
ret i32 %a
@ -167,13 +131,9 @@ define i32 @or32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.xor push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.xor $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @xor32(i32 %x, i32 %y) {
%a = xor i32 %x, %y
ret i32 %a
@ -184,13 +144,9 @@ define i32 @xor32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.shl push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.shl $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @shl32(i32 %x, i32 %y) {
%a = shl i32 %x, %y
ret i32 %a
@ -201,13 +157,9 @@ define i32 @shl32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.shr_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.shr_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @shr32(i32 %x, i32 %y) {
%a = lshr i32 %x, %y
ret i32 %a
@ -218,13 +170,9 @@ define i32 @shr32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.shr_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i32.shr_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i32 @sar32(i32 %x, i32 %y) {
%a = ashr i32 %x, %y
ret i32 %a
@ -234,11 +182,9 @@ define i32 @sar32(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.clz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.clz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @clz32(i32 %x) {
%a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
ret i32 %a
@ -248,11 +194,9 @@ define i32 @clz32(i32 %x) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.clz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.clz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @clz32_zero_undef(i32 %x) {
%a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
ret i32 %a
@ -262,11 +206,9 @@ define i32 @clz32_zero_undef(i32 %x) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.ctz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.ctz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @ctz32(i32 %x) {
%a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
ret i32 %a
@ -276,11 +218,9 @@ define i32 @ctz32(i32 %x) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.ctz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.ctz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @ctz32_zero_undef(i32 %x) {
%a = call i32 @llvm.cttz.i32(i32 %x, i1 true)
ret i32 %a
@ -290,11 +230,9 @@ define i32 @ctz32_zero_undef(i32 %x) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.popcnt push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.popcnt $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @popcnt32(i32 %x) {
%a = call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %a

170
llvm/test/CodeGen/WebAssembly/i64.ll
View File

@ -14,13 +14,9 @@ declare i64 @llvm.ctpop.i64(i64)
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.add push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.add $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @add64(i64 %x, i64 %y) {
%a = add i64 %x, %y
ret i64 %a
@ -31,13 +27,9 @@ define i64 @add64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.sub push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.sub $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @sub64(i64 %x, i64 %y) {
%a = sub i64 %x, %y
ret i64 %a
@ -48,13 +40,9 @@ define i64 @sub64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.mul push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.mul $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @mul64(i64 %x, i64 %y) {
%a = mul i64 %x, %y
ret i64 %a
@ -65,13 +53,9 @@ define i64 @mul64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.div_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.div_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @sdiv64(i64 %x, i64 %y) {
%a = sdiv i64 %x, %y
ret i64 %a
@ -82,13 +66,9 @@ define i64 @sdiv64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.div_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.div_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @udiv64(i64 %x, i64 %y) {
%a = udiv i64 %x, %y
ret i64 %a
@ -99,13 +79,9 @@ define i64 @udiv64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.rem_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.rem_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @srem64(i64 %x, i64 %y) {
%a = srem i64 %x, %y
ret i64 %a
@ -116,13 +92,9 @@ define i64 @srem64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.rem_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.rem_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @urem64(i64 %x, i64 %y) {
%a = urem i64 %x, %y
ret i64 %a
@ -133,13 +105,9 @@ define i64 @urem64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.and push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.and $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @and64(i64 %x, i64 %y) {
%a = and i64 %x, %y
ret i64 %a
@ -150,13 +118,9 @@ define i64 @and64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.or push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.or $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @or64(i64 %x, i64 %y) {
%a = or i64 %x, %y
ret i64 %a
@ -167,13 +131,9 @@ define i64 @or64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.xor push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.xor $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @xor64(i64 %x, i64 %y) {
%a = xor i64 %x, %y
ret i64 %a
@ -184,13 +144,9 @@ define i64 @xor64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.shl push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.shl $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @shl64(i64 %x, i64 %y) {
%a = shl i64 %x, %y
ret i64 %a
@ -201,13 +157,9 @@ define i64 @shl64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.shr_u push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.shr_u $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @shr64(i64 %x, i64 %y) {
%a = lshr i64 %x, %y
ret i64 %a
@ -218,13 +170,9 @@ define i64 @shr64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64, i64{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.shr_s push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
; CHECK-NEXT: i64.shr_s $push, (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
define i64 @sar64(i64 %x, i64 %y) {
%a = ashr i64 %x, %y
ret i64 %a
@ -234,11 +182,9 @@ define i64 @sar64(i64 %x, i64 %y) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.clz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.clz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @clz64(i64 %x) {
%a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
ret i64 %a
@ -248,11 +194,9 @@ define i64 @clz64(i64 %x) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.clz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.clz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @clz64_zero_undef(i64 %x) {
%a = call i64 @llvm.ctlz.i64(i64 %x, i1 true)
ret i64 %a
@ -262,11 +206,9 @@ define i64 @clz64_zero_undef(i64 %x) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.ctz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.ctz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @ctz64(i64 %x) {
%a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
ret i64 %a
@ -276,11 +218,9 @@ define i64 @ctz64(i64 %x) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.ctz push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.ctz $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @ctz64_zero_undef(i64 %x) {
%a = call i64 @llvm.cttz.i64(i64 %x, i1 true)
ret i64 %a
@ -290,11 +230,9 @@ define i64 @ctz64_zero_undef(i64 %x) {
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.popcnt push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.popcnt $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @popcnt64(i64 %x) {
%a = call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %a

96
llvm/test/CodeGen/WebAssembly/immediates.ll
View File

@ -8,8 +8,8 @@ target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: zero_i32:
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i32.const push, 0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i32.const $push, 0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @zero_i32() {
ret i32 0
@ -18,8 +18,8 @@ define i32 @zero_i32() {
; CHECK-LABEL: one_i32:
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i32.const push, 1{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i32.const $push, 1{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @one_i32() {
ret i32 1
@ -28,8 +28,8 @@ define i32 @one_i32() {
; CHECK-LABEL: max_i32:
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i32.const push, 2147483647{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i32.const $push, 2147483647{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @max_i32() {
ret i32 2147483647
@ -38,8 +38,8 @@ define i32 @max_i32() {
; CHECK-LABEL: min_i32:
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i32.const push, -2147483648{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i32.const $push, -2147483648{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @min_i32() {
ret i32 -2147483648
@ -48,8 +48,8 @@ define i32 @min_i32() {
; CHECK-LABEL: zero_i64:
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i64.const push, 0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i64.const $push, 0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i64 @zero_i64() {
ret i64 0
@ -58,8 +58,8 @@ define i64 @zero_i64() {
; CHECK-LABEL: one_i64:
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i64.const push, 1{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i64.const $push, 1{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i64 @one_i64() {
ret i64 1
@ -68,8 +68,8 @@ define i64 @one_i64() {
; CHECK-LABEL: max_i64:
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i64.const push, 9223372036854775807{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i64.const $push, 9223372036854775807{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i64 @max_i64() {
ret i64 9223372036854775807
@ -78,8 +78,8 @@ define i64 @max_i64() {
; CHECK-LABEL: min_i64:
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: i64.const push, -9223372036854775808{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: i64.const $push, -9223372036854775808{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i64 @min_i64() {
ret i64 -9223372036854775808
@ -88,8 +88,8 @@ define i64 @min_i64() {
; CHECK-LABEL: negzero_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, -0x0p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, -0x0p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @negzero_f32() {
ret float -0.0
@ -98,8 +98,8 @@ define float @negzero_f32() {
; CHECK-LABEL: zero_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, 0x0p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, 0x0p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @zero_f32() {
ret float 0.0
@ -108,8 +108,8 @@ define float @zero_f32() {
; CHECK-LABEL: one_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, 0x1p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, 0x1p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @one_f32() {
ret float 1.0
@ -118,8 +118,8 @@ define float @one_f32() {
; CHECK-LABEL: two_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, 0x1p1{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, 0x1p1{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @two_f32() {
ret float 2.0
@ -128,8 +128,8 @@ define float @two_f32() {
; CHECK-LABEL: nan_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, nan
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, nan
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @nan_f32() {
ret float 0x7FF8000000000000
@ -138,8 +138,8 @@ define float @nan_f32() {
; CHECK-LABEL: negnan_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, -nan
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, -nan
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @negnan_f32() {
ret float 0xFFF8000000000000
@ -148,8 +148,8 @@ define float @negnan_f32() {
; CHECK-LABEL: inf_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, infinity
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, infinity
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @inf_f32() {
ret float 0x7FF0000000000000
@ -158,8 +158,8 @@ define float @inf_f32() {
; CHECK-LABEL: neginf_f32:
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f32.const push, -infinity
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f32.const $push, -infinity
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define float @neginf_f32() {
ret float 0xFFF0000000000000
@ -168,8 +168,8 @@ define float @neginf_f32() {
; CHECK-LABEL: negzero_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, -0x0p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, -0x0p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @negzero_f64() {
ret double -0.0
@ -178,8 +178,8 @@ define double @negzero_f64() {
; CHECK-LABEL: zero_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, 0x0p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, 0x0p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @zero_f64() {
ret double 0.0
@ -188,8 +188,8 @@ define double @zero_f64() {
; CHECK-LABEL: one_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, 0x1p0{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, 0x1p0{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @one_f64() {
ret double 1.0
@ -198,8 +198,8 @@ define double @one_f64() {
; CHECK-LABEL: two_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, 0x1p1{{$}}
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, 0x1p1{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @two_f64() {
ret double 2.0
@ -208,8 +208,8 @@ define double @two_f64() {
; CHECK-LABEL: nan_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, nan
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, nan
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @nan_f64() {
ret double 0x7FF8000000000000
@ -218,8 +218,8 @@ define double @nan_f64() {
; CHECK-LABEL: negnan_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, -nan
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, -nan
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @negnan_f64() {
ret double 0xFFF8000000000000
@ -228,8 +228,8 @@ define double @negnan_f64() {
; CHECK-LABEL: inf_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, infinity
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, infinity
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @inf_f64() {
ret double 0x7FF0000000000000
@ -238,8 +238,8 @@ define double @inf_f64() {
; CHECK-LABEL: neginf_f64:
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local
; CHECK-NEXT: f64.const push, -infinity
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: f64.const $push, -infinity
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define double @neginf_f64() {
ret double 0xFFF0000000000000

14
llvm/test/CodeGen/WebAssembly/import.ll
View File

@ -16,13 +16,13 @@ define void @f(i32 %a, float %b, i128 %c, i1 %d) {
}
; CHECK-LABEL: .imports
; CHECK-NEXT: .import $printi "" "printi" (param i32) (result i32){{$}}
; CHECK-NEXT: .import $printf "" "printf" (param f32) (result f32){{$}}
; CHECK-NEXT: .import $printv "" "printv"{{$}}
; CHECK-NEXT: .import $add2 "" "add2" (param i32 i32) (result i32){{$}}
; CHECK-NEXT: .import $split_arg "" "split_arg" (param i64 i64){{$}}
; CHECK-NEXT: .import $expanded_arg "" "expanded_arg" (param i32){{$}}
; CHECK-NEXT: .import $lowered_result "" "lowered_result" (result i32){{$}}
; CHECK-NEXT: .import printi "" printi (param i32) (result i32){{$}}
; CHECK-NEXT: .import printf "" printf (param f32) (result f32){{$}}
; CHECK-NEXT: .import printv "" printv{{$}}
; CHECK-NEXT: .import add2 "" add2 (param i32 i32) (result i32){{$}}
; CHECK-NEXT: .import split_arg "" split_arg (param i64 i64){{$}}
; CHECK-NEXT: .import expanded_arg "" expanded_arg (param i32){{$}}
; CHECK-NEXT: .import lowered_result "" lowered_result (result i32){{$}}
declare i32 @printi(i32)
declare float @printf(float)
declare void @printv()

40
llvm/test/CodeGen/WebAssembly/load-ext.ll
View File

@ -6,8 +6,8 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sext_i8_i32:
; CHECK: i32.load8_s push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i32.load8_s $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i32 @sext_i8_i32(i8 *%p) {
%v = load i8, i8* %p
%e = sext i8 %v to i32
@ -15,8 +15,8 @@ define i32 @sext_i8_i32(i8 *%p) {
}
; CHECK-LABEL: zext_i8_i32:
; CHECK: i32.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i32.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i32 @zext_i8_i32(i8 *%p) {
%v = load i8, i8* %p
%e = zext i8 %v to i32
@ -24,8 +24,8 @@ define i32 @zext_i8_i32(i8 *%p) {
}
; CHECK-LABEL: sext_i16_i32:
; CHECK: i32.load16_s push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i32.load16_s $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i32 @sext_i16_i32(i16 *%p) {
%v = load i16, i16* %p
%e = sext i16 %v to i32
@ -33,8 +33,8 @@ define i32 @sext_i16_i32(i16 *%p) {
}
; CHECK-LABEL: zext_i16_i32:
; CHECK: i32.load16_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i32.load16_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i32 @zext_i16_i32(i16 *%p) {
%v = load i16, i16* %p
%e = zext i16 %v to i32
@ -42,8 +42,8 @@ define i32 @zext_i16_i32(i16 *%p) {
}
; CHECK-LABEL: sext_i8_i64:
; CHECK: i64.load8_s push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i64.load8_s $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i64 @sext_i8_i64(i8 *%p) {
%v = load i8, i8* %p
%e = sext i8 %v to i64
@ -51,8 +51,8 @@ define i64 @sext_i8_i64(i8 *%p) {
}
; CHECK-LABEL: zext_i8_i64:
; CHECK: i64.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i64.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i64 @zext_i8_i64(i8 *%p) {
%v = load i8, i8* %p
%e = zext i8 %v to i64
@ -60,8 +60,8 @@ define i64 @zext_i8_i64(i8 *%p) {
}
; CHECK-LABEL: sext_i16_i64:
; CHECK: i64.load16_s push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i64.load16_s $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i64 @sext_i16_i64(i16 *%p) {
%v = load i16, i16* %p
%e = sext i16 %v to i64
@ -69,8 +69,8 @@ define i64 @sext_i16_i64(i16 *%p) {
}
; CHECK-LABEL: zext_i16_i64:
; CHECK: i64.load16_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i64.load16_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i64 @zext_i16_i64(i16 *%p) {
%v = load i16, i16* %p
%e = zext i16 %v to i64
@ -78,8 +78,8 @@ define i64 @zext_i16_i64(i16 *%p) {
}
; CHECK-LABEL: sext_i32_i64:
; CHECK: i64.load32_s push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK: i64.load32_s $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
define i64 @sext_i32_i64(i32 *%p) {
%v = load i32, i32* %p
%e = sext i32 %v to i64
@ -87,8 +87,8 @@ define i64 @sext_i32_i64(i32 *%p) {
}
; CHECK-LABEL: zext_i32_i64:
; CHECK: i64.load32_u push, (get_local 1){{$}}
; CHECK: set_local 2, pop{{$}}
; CHECK: i64.load32_u $push, (get_local 0){{$}}
; CHECK: set_local 1, $pop{{$}}
define i64 @zext_i32_i64(i32 *%p) {
%v = load i32, i32* %p
%e = zext i32 %v to i64

68
llvm/test/CodeGen/WebAssembly/load-store-i1.ll
View File

@ -6,9 +6,9 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: load_u_i1_i32:
; CHECK: i32.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK: i32.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @load_u_i1_i32(i1* %p) {
%v = load i1, i1* %p
%e = zext i1 %v to i32
@ -16,15 +16,15 @@ define i32 @load_u_i1_i32(i1* %p) {
}
; CHECK-LABEL: load_s_i1_i32:
; CHECK: i32.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: i32.const push, 31{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: shl push, (get_local 2), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: shr_s push, (get_local 4), (get_local 3){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: return (get_local 5){{$}}
; CHECK: i32.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: i32.const $push, 31{{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i32 @load_s_i1_i32(i1* %p) {
%v = load i1, i1* %p
%e = sext i1 %v to i32
@ -32,9 +32,9 @@ define i32 @load_s_i1_i32(i1* %p) {
}
; CHECK-LABEL: load_u_i1_i64:
; CHECK: i64.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK: i64.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @load_u_i1_i64(i1* %p) {
%v = load i1, i1* %p
%e = zext i1 %v to i64
@ -42,15 +42,15 @@ define i64 @load_u_i1_i64(i1* %p) {
}
; CHECK-LABEL: load_s_i1_i64:
; CHECK: i64.load8_u push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: i64.const push, 63{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: shl push, (get_local 2), (get_local 3){{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: shr_s push, (get_local 4), (get_local 3){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: return (get_local 5){{$}}
; CHECK: i64.load8_u $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: i64.const $push, 63{{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: set_local 4, $pop{{$}}
; CHECK-NEXT: return (get_local 4){{$}}
define i64 @load_s_i1_i64(i1* %p) {
%v = load i1, i1* %p
%e = sext i1 %v to i64
@ -58,11 +58,11 @@ define i64 @load_s_i1_i64(i1* %p) {
}
; CHECK-LABEL: store_i32_i1:
; CHECK: i32.const push, 1{{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: i32.and push, (get_local 3), (get_local 4){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i32.store8 (get_local 2), (get_local 5){{$}}
; CHECK: i32.const $push, 1{{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: i32.and $push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i32.store8 (get_local 0), (get_local 3){{$}}
define void @store_i32_i1(i1* %p, i32 %v) {
%t = trunc i32 %v to i1
store i1 %t, i1* %p
@ -70,11 +70,11 @@ define void @store_i32_i1(i1* %p, i32 %v) {
}
; CHECK-LABEL: store_i64_i1:
; CHECK: i64.const push, 1{{$}}
; CHECK-NEXT: set_local 4, pop{{$}}
; CHECK-NEXT: i64.and push, (get_local 3), (get_local 4){{$}}
; CHECK-NEXT: set_local 5, pop{{$}}
; CHECK-NEXT: i64.store8 (get_local 2), (get_local 5){{$}}
; CHECK: i64.const $push, 1{{$}}
; CHECK-NEXT: set_local 2, $pop{{$}}
; CHECK-NEXT: i64.and $push, (get_local 1), (get_local 2){{$}}
; CHECK-NEXT: set_local 3, $pop{{$}}
; CHECK-NEXT: i64.store8 (get_local 0), (get_local 3){{$}}
define void @store_i64_i1(i1* %p, i64 %v) {
%t = trunc i64 %v to i1
store i1 %t, i1* %p

32
llvm/test/CodeGen/WebAssembly/load.ll
View File

@ -9,11 +9,9 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i32.load push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i32.load $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @ldi32(i32 *%p) {
%v = load i32, i32* %p
ret i32 %v
@ -23,11 +21,9 @@ define i32 @ldi32(i32 *%p) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i32, i64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: i64.load push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: i64.load $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i64 @ldi64(i64 *%p) {
%v = load i64, i64* %p
ret i64 %v
@ -37,11 +33,9 @@ define i64 @ldi64(i64 *%p) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: .local i32, f32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f32.load push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f32.load $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define float @ldf32(float *%p) {
%v = load float, float* %p
ret float %v
@ -51,11 +45,9 @@ define float @ldf32(float *%p) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: .local i32, f64{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 1, pop{{$}}
; CHECK-NEXT: f64.load push, (get_local 1){{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: f64.load $push, (get_local 0){{$}}
; CHECK-NEXT: set_local 1, $pop{{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define double @ldf64(double *%p) {
%v = load double, double* %p
ret double %v

4
llvm/test/CodeGen/WebAssembly/memory-addr32.ll
View File

@ -12,7 +12,7 @@ declare void @llvm.wasm.grow.memory.i32(i32) nounwind
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: memory_size
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @memory_size() {
%a = call i32 @llvm.wasm.memory.size.i32()
@ -22,7 +22,7 @@ define i32 @memory_size() {
; CHECK-LABEL: grow_memory:
; CHECK-NEXT: .param i32
; CHECK-NEXT: .local i32{{$}}
; CHECK: grow_memory (get_local 1)
; CHECK: grow_memory (get_local 0)
; CHECK-NEXT: return
define void @grow_memory(i32 %n) {
call void @llvm.wasm.grow.memory.i32(i32 %n)

4
llvm/test/CodeGen/WebAssembly/memory-addr64.ll
View File

@ -12,7 +12,7 @@ declare void @llvm.wasm.grow.memory.i64(i64) nounwind
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: .local i64{{$}}
; CHECK-NEXT: memory_size
; CHECK-NEXT: set_local 0, pop{{$}}
; CHECK-NEXT: set_local 0, $pop{{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i64 @memory_size() {
%a = call i64 @llvm.wasm.memory.size.i64()
@ -22,7 +22,7 @@ define i64 @memory_size() {
; CHECK-LABEL: grow_memory:
; CHECK-NEXT: .param i64
; CHECK-NEXT: .local i64{{$}}
; CHECK: grow_memory (get_local 1)
; CHECK: grow_memory (get_local 0)
; CHECK-NEXT: return
define void @grow_memory(i64 %n) {
call void @llvm.wasm.grow.memory.i64(i64 %n)

17
llvm/test/CodeGen/WebAssembly/phi.ll
View File

@ -8,11 +8,9 @@ target triple = "wasm32-unknown-unknown"
; Basic phi triangle.
; CHECK-LABEL: test0:
; CHECK: get_local push, 0{{$}}
; CHECK: set_local [[REG:.*]], pop
; CHECK: div_s push, (get_local [[REG]]), {{.*}}
; CHECK: set_local [[REG]], pop
; CHECK: return (get_local [[REG]])
; CHECK: div_s $push, (get_local 0), (get_local 3){{$}}
; CHECK: set_local 0, $pop
; CHECK: return (get_local 0)
define i32 @test0(i32 %p) {
entry:
%t = icmp slt i32 %p, 0
@ -29,12 +27,9 @@ done:
; CHECK-LABEL: test1:
; CHECK: BB1_1:
; CHECK: get_local push, [[REG1:.*]]
; CHECK: set_local [[REG0:.*]], pop
; CHECK: get_local push, [[REG2:.*]]
; CHECK: set_local [[REG1]], pop
; CHECK: [[REG0]]
; CHECK: set_local [[REG2]], pop
; CHECK: set_local [[REG0:.*]], (get_local [[REG1:.*]])
; CHECK: set_local [[REG1]], (get_local [[REG2:.*]])
; CHECK: set_local [[REG2]], (get_local [[REG0]])
define i32 @test1(i32 %n) {
entry:
br label %loop

2
llvm/test/CodeGen/WebAssembly/return-int32.ll
View File

@ -4,7 +4,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_i32:
; CHECK: return (get_local 1){{$}}
; CHECK: return (get_local 0){{$}}
define i32 @return_i32(i32 %p) {
ret i32 %p
}

40
llvm/test/CodeGen/WebAssembly/select.ll
View File

@ -7,13 +7,9 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: select_i32:
; CHECK: get_local push, 1
; CHECK: set_local [[LOCAL_B:[0-9]]]
; CHECK: get_local push, 0
; CHECK: set_local [[LOCAL_A:[0-9]]]
; CHECK: i32.eq push, (get_local 5), (get_local 6)
; CHECK: set_local 7, pop
; CHECK: i32.select push, (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
; CHECK: i32.eq $push, (get_local 2), (get_local 3)
; CHECK: set_local 4, $pop
; CHECK: i32.select $push, (get_local 4), (get_local 0), (get_local 1)
define i32 @select_i32(i32 %a, i32 %b, i32 %cond) {
%cc = icmp eq i32 %cond, 0
%result = select i1 %cc, i32 %a, i32 %b
@ -21,13 +17,9 @@ define i32 @select_i32(i32 %a, i32 %b, i32 %cond) {
}
; CHECK-LABEL: select_i64:
; CHECK: get_local push, 1
; CHECK: set_local [[LOCAL_B:[0-9]]]
; CHECK: get_local push, 0
; CHECK: set_local [[LOCAL_A:[0-9]]]
; CHECK: i32.eq push, (get_local 5), (get_local 6)
; CHECK: set_local 7, pop
; CHECK: i64.select push, (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
; CHECK: i32.eq $push, (get_local 2), (get_local 3)
; CHECK: set_local 4, $pop
; CHECK: i64.select $push, (get_local 4), (get_local 0), (get_local 1)
define i64 @select_i64(i64 %a, i64 %b, i32 %cond) {
%cc = icmp eq i32 %cond, 0
%result = select i1 %cc, i64 %a, i64 %b
@ -35,13 +27,9 @@ define i64 @select_i64(i64 %a, i64 %b, i32 %cond) {
}
; CHECK-LABEL: select_f32:
; CHECK: get_local push, 1
; CHECK: set_local [[LOCAL_B:[0-9]]]
; CHECK: get_local push, 0
; CHECK: set_local [[LOCAL_A:[0-9]]]
; CHECK: i32.eq push, (get_local 5), (get_local 6)
; CHECK: set_local 7, pop
; CHECK: f32.select push, (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
; CHECK: i32.eq $push, (get_local 2), (get_local 3)
; CHECK: set_local 4, $pop
; CHECK: f32.select $push, (get_local 4), (get_local 0), (get_local 1)
define float @select_f32(float %a, float %b, i32 %cond) {
%cc = icmp eq i32 %cond, 0
%result = select i1 %cc, float %a, float %b
@ -49,13 +37,9 @@ define float @select_f32(float %a, float %b, i32 %cond) {
}
; CHECK-LABEL: select_f64:
; CHECK: get_local push, 1
; CHECK: set_local [[LOCAL_B:[0-9]]]
; CHECK: get_local push, 0
; CHECK: set_local [[LOCAL_A:[0-9]]]
; CHECK: i32.eq push, (get_local 5), (get_local 6)
; CHECK: set_local 7, pop
; CHECK: f64.select push, (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
; CHECK: i32.eq $push, (get_local 2), (get_local 3)
; CHECK: set_local 4, $pop
; CHECK: f64.select $push, (get_local 4), (get_local 0), (get_local 1)
define double @select_f64(double %a, double %b, i32 %cond) {
%cc = icmp eq i32 %cond, 0
%result = select i1 %cc, double %a, double %b

10
llvm/test/CodeGen/WebAssembly/store-trunc.ll
View File

@ -6,7 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: trunc_i8_i32:
; CHECK: i32.store8 (get_local 3), (get_local 2){{$}}
; CHECK: i32.store8 (get_local 0), (get_local 1){{$}}
define void @trunc_i8_i32(i8 *%p, i32 %v) {
%t = trunc i32 %v to i8
store i8 %t, i8* %p
@ -14,7 +14,7 @@ define void @trunc_i8_i32(i8 *%p, i32 %v) {
}
; CHECK-LABEL: trunc_i16_i32:
; CHECK: i32.store16 (get_local 3), (get_local 2){{$}}
; CHECK: i32.store16 (get_local 0), (get_local 1){{$}}
define void @trunc_i16_i32(i16 *%p, i32 %v) {
%t = trunc i32 %v to i16
store i16 %t, i16* %p
@ -22,7 +22,7 @@ define void @trunc_i16_i32(i16 *%p, i32 %v) {
}
; CHECK-LABEL: trunc_i8_i64:
; CHECK: i64.store8 (get_local 3), (get_local 2){{$}}
; CHECK: i64.store8 (get_local 0), (get_local 1){{$}}
define void @trunc_i8_i64(i8 *%p, i64 %v) {
%t = trunc i64 %v to i8
store i8 %t, i8* %p
@ -30,7 +30,7 @@ define void @trunc_i8_i64(i8 *%p, i64 %v) {
}
; CHECK-LABEL: trunc_i16_i64:
; CHECK: i64.store16 (get_local 3), (get_local 2){{$}}
; CHECK: i64.store16 (get_local 0), (get_local 1){{$}}
define void @trunc_i16_i64(i16 *%p, i64 %v) {
%t = trunc i64 %v to i16
store i16 %t, i16* %p
@ -38,7 +38,7 @@ define void @trunc_i16_i64(i16 *%p, i64 %v) {
}
; CHECK-LABEL: trunc_i32_i64:
; CHECK: i64.store32 (get_local 3), (get_local 2){{$}}
; CHECK: i64.store32 (get_local 0), (get_local 1){{$}}
define void @trunc_i32_i64(i32 *%p, i64 %v) {
%t = trunc i64 %v to i32
store i32 %t, i32* %p

24
llvm/test/CodeGen/WebAssembly/store.ll
View File

@ -9,11 +9,7 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .local i32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i32.store (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: i32.store (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: return{{$}}
define void @sti32(i32 *%p, i32 %v) {
store i32 %v, i32* %p
@ -24,11 +20,7 @@ define void @sti32(i32 *%p, i32 %v) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .local i64, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: i64.store (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: i64.store (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: return{{$}}
define void @sti64(i64 *%p, i64 %v) {
store i64 %v, i64* %p
@ -39,11 +31,7 @@ define void @sti64(i64 *%p, i64 %v) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .local f32, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f32.store (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: f32.store (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: return{{$}}
define void @stf32(float *%p, float %v) {
store float %v, float* %p
@ -54,11 +42,7 @@ define void @stf32(float *%p, float %v) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .local f64, i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 3, pop{{$}}
; CHECK-NEXT: f64.store (get_local 3), (get_local 2){{$}}
; CHECK-NEXT: f64.store (get_local 0), (get_local 1){{$}}
; CHECK-NEXT: return{{$}}
define void @stf64(double *%p, double %v) {
store double %v, double* %p

56
llvm/test/CodeGen/WebAssembly/switch.ll
View File

@ -13,26 +13,26 @@ declare void @foo4()
declare void @foo5()
; CHECK-LABEL: bar32:
; CHECK: block $BB0_8{{$}}
; CHECK: block $BB0_7{{$}}
; CHECK: block $BB0_6{{$}}
; CHECK: block $BB0_5{{$}}
; CHECK: block $BB0_4{{$}}
; CHECK: block $BB0_3{{$}}
; CHECK: block $BB0_2{{$}}
; CHECK: switch {{.*}}, $BB0_2, $BB0_2, $BB0_2, $BB0_2, $BB0_2, $BB0_2, $BB0_2, $BB0_2, $BB0_3, $BB0_3, $BB0_3, $BB0_3, $BB0_3, $BB0_3, $BB0_3, $BB0_3, $BB0_4, $BB0_4, $BB0_4, $BB0_4, $BB0_4, $BB0_4, $BB0_5, $BB0_6, $BB0_7{{$}}
; CHECK: block BB0_8{{$}}
; CHECK: block BB0_7{{$}}
; CHECK: block BB0_6{{$}}
; CHECK: block BB0_5{{$}}
; CHECK: block BB0_4{{$}}
; CHECK: block BB0_3{{$}}
; CHECK: block BB0_2{{$}}
; CHECK: switch {{.*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}}
; CHECK: BB0_2:
; CHECK: call $foo0
; CHECK: call foo0
; CHECK: BB0_3:
; CHECK: call $foo1
; CHECK: call foo1
; CHECK: BB0_4:
; CHECK: call $foo2
; CHECK: call foo2
; CHECK: BB0_5:
; CHECK: call $foo3
; CHECK: call foo3
; CHECK: BB0_6:
; CHECK: call $foo4
; CHECK: call foo4
; CHECK: BB0_7:
; CHECK: call $foo5
; CHECK: call foo5
; CHECK: BB0_8:
; CHECK: return{{$}}
define void @bar32(i32 %n) {
@ -93,26 +93,26 @@ sw.epilog: ; preds = %entry, %sw.bb.5, %s
}
; CHECK-LABEL: bar64:
; CHECK: block $BB1_8{{$}}
; CHECK: block $BB1_7{{$}}
; CHECK: block $BB1_6{{$}}
; CHECK: block $BB1_5{{$}}
; CHECK: block $BB1_4{{$}}
; CHECK: block $BB1_3{{$}}
; CHECK: block $BB1_2{{$}}
; CHECK: switch {{.*}}, $BB1_2, $BB1_2, $BB1_2, $BB1_2, $BB1_2, $BB1_2, $BB1_2, $BB1_2, $BB1_3, $BB1_3, $BB1_3, $BB1_3, $BB1_3, $BB1_3, $BB1_3, $BB1_3, $BB1_4, $BB1_4, $BB1_4, $BB1_4, $BB1_4, $BB1_4, $BB1_5, $BB1_6, $BB1_7{{$}}
; CHECK: block BB1_8{{$}}
; CHECK: block BB1_7{{$}}
; CHECK: block BB1_6{{$}}
; CHECK: block BB1_5{{$}}
; CHECK: block BB1_4{{$}}
; CHECK: block BB1_3{{$}}
; CHECK: block BB1_2{{$}}
; CHECK: switch {{.*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}}
; CHECK: BB1_2:
; CHECK: call $foo0
; CHECK: call foo0
; CHECK: BB1_3:
; CHECK: call $foo1
; CHECK: call foo1
; CHECK: BB1_4:
; CHECK: call $foo2
; CHECK: call foo2
; CHECK: BB1_5:
; CHECK: call $foo3
; CHECK: call foo3
; CHECK: BB1_6:
; CHECK: call $foo4
; CHECK: call foo4
; CHECK: BB1_7:
; CHECK: call $foo5
; CHECK: call foo5
; CHECK: BB1_8:
; CHECK: return{{$}}
define void @bar64(i64 %n) {

2
llvm/test/CodeGen/WebAssembly/unreachable.ll
View File

@ -12,7 +12,7 @@ declare void @llvm.debugtrap()
declare void @abort()
; CHECK-LABEL: f1:
; CHECK: call $abort
; CHECK: call abort
; CHECK: unreachable
define i32 @f1() {
call void @abort()

8
llvm/test/CodeGen/WebAssembly/unused-argument.ll
View File

@ -10,9 +10,7 @@ target triple = "wasm32-unknown-unknown"
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: get_local push, 1{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: return (get_local 1){{$}}
define i32 @unused_first(i32 %x, i32 %y) {
ret i32 %y
}
@ -22,9 +20,7 @@ define i32 @unused_first(i32 %x, i32 %y) {
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: get_local push, 0{{$}}
; CHECK-NEXT: set_local 2, pop{{$}}
; CHECK-NEXT: return (get_local 2){{$}}
; CHECK-NEXT: return (get_local 0){{$}}
define i32 @unused_second(i32 %x, i32 %y) {
ret i32 %x
}