forked from OSchip/llvm-project
PowerPC: support external pid instructions in MC layer.
This adds assembly & disassembly support for the e500mc "external pid" instructions. See https://reviews.llvm.org/D39249. Patch by vit9696 <vit9696@avp.su> llvm-svn: 320287
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@ -3933,6 +3933,63 @@ def STWCIX : XForm_base_r3xo<31, 917, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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def STDCIX : XForm_base_r3xo<31, 1013, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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"stdcix $RST, $A, $B", IIC_LdStLoad, []>;
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// External PID Load Store Instructions
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def LBEPX : XForm_1<31, 95, (outs gprc:$rD), (ins memrr:$src),
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"lbepx $rD, $src", IIC_LdStLoad, []>,
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Requires<[IsE500]>;
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def LFDEPX : XForm_25<31, 607, (outs f8rc:$frD), (ins memrr:$src),
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"lfdepx $frD, $src", IIC_LdStLFD, []>,
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Requires<[IsE500]>;
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def LHEPX : XForm_1<31, 287, (outs gprc:$rD), (ins memrr:$src),
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"lhepx $rD, $src", IIC_LdStLoad, []>,
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Requires<[IsE500]>;
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def LWEPX : XForm_1<31, 31, (outs gprc:$rD), (ins memrr:$src),
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"lwepx $rD, $src", IIC_LdStLoad, []>,
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Requires<[IsE500]>;
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def STBEPX : XForm_8<31, 223, (outs), (ins gprc:$rS, memrr:$dst),
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"stbepx $rS, $dst", IIC_LdStStore, []>,
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Requires<[IsE500]>;
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def STFDEPX : XForm_28<31, 735, (outs), (ins f8rc:$frS, memrr:$dst),
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"stfdepx $frS, $dst", IIC_LdStSTFD, []>,
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Requires<[IsE500]>;
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def STHEPX : XForm_8<31, 415, (outs), (ins gprc:$rS, memrr:$dst),
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"sthepx $rS, $dst", IIC_LdStStore, []>,
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Requires<[IsE500]>;
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def STWEPX : XForm_8<31, 159, (outs), (ins gprc:$rS, memrr:$dst),
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"stwepx $rS, $dst", IIC_LdStStore, []>,
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Requires<[IsE500]>;
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def DCBFEP : DCB_Form<127, 0, (outs), (ins memrr:$dst), "dcbfep $dst",
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IIC_LdStDCBF, []>, Requires<[IsE500]>;
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def DCBSTEP : DCB_Form<63, 0, (outs), (ins memrr:$dst), "dcbstep $dst",
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IIC_LdStDCBF, []>, Requires<[IsE500]>;
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def DCBTEP : DCB_Form_hint<319, (outs), (ins memrr:$dst, u5imm:$TH),
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"dcbtep $TH, $dst", IIC_LdStDCBF, []>,
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Requires<[IsE500]>;
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def DCBTSTEP : DCB_Form_hint<255, (outs), (ins memrr:$dst, u5imm:$TH),
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"dcbtstep $TH, $dst", IIC_LdStDCBF, []>,
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Requires<[IsE500]>;
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def DCBZEP : DCB_Form<1023, 0, (outs), (ins memrr:$dst), "dcbzep $dst",
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IIC_LdStDCBF, []>, Requires<[IsE500]>;
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def DCBZLEP : DCB_Form<1023, 1, (outs), (ins memrr:$dst), "dcbzlep $dst",
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IIC_LdStDCBF, []>, Requires<[IsE500]>;
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def ICBIEP : XForm_1a<31, 991, (outs), (ins memrr:$src), "icbiep $src",
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IIC_LdStICBI, []>, Requires<[IsE500]>;
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//===----------------------------------------------------------------------===//
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// PowerPC Assembler Instruction Aliases
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//
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@ -0,0 +1,34 @@
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# RUN: llvm-mc --disassemble %s -triple powerpc-unknown-unknown | FileCheck %s
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# Extended PID instructions specific to the e500 / e500mc cores:
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# CHECK: lbepx 1, 2, 3
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0x7c 0x22 0x18 0xbe
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# CHECK: lfdepx 4, 5, 6
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0x7c 0x85 0x34 0xbe
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# CHECK: lhepx 7, 8, 9
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0x7c 0xe8 0x4a 0x3e
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# CHECK: lwepx 10, 11, 12
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0x7d 0x4b 0x60 0x3e
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# CHECK: stbepx 13, 14, 15
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0x7d 0xae 0x79 0xbe
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# CHECK: stfdepx 16, 17, 18
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0x7e 0x11 0x95 0xbe
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# CHECK: sthepx 19, 20, 21
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0x7e 0x74 0xab 0x3e
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# CHECK: stwepx 22, 23, 24
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0x7e 0xd7 0xc1 0x3e
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# CHECK: dcbfep 25, 26
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0x7c 0x19 0xd0 0xfe
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# CHECK: dcbstep 27, 28
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0x7c 0x1b 0xe0 0x7e
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# CHECK: dcbtep 29, 30, 31
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0x7f 0xbe 0xfa 0x7e
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# CHECK: dcbtstep 0, 1, 2
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0x7c 0x01 0x11 0xfe
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# CHECK: dcbzep 3, 4
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0x7c 0x03 0x27 0xfe
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# CHECK: dcbzlep 5, 6
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0x7c 0x25 0x37 0xfe
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# CHECK: icbiep 7, 8
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0x7c 0x07 0x47 0xbe
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@ -0,0 +1,34 @@
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# RUN: llvm-mc -triple powerpc-unknown-unknown --show-encoding %s | FileCheck %s
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# Extended PID instructions specific to the e500 / e500mc cores:
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# CHECK: lbepx 1, 2, 3 # encoding: [0x7c,0x22,0x18,0xbe]
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lbepx 1, 2, 3
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# CHECK: lfdepx 4, 5, 6 # encoding: [0x7c,0x85,0x34,0xbe]
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lfdepx 4, 5, 6
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# CHECK: lhepx 7, 8, 9 # encoding: [0x7c,0xe8,0x4a,0x3e]
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lhepx 7, 8, 9
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# CHECK: lwepx 10, 11, 12 # encoding: [0x7d,0x4b,0x60,0x3e]
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lwepx 10, 11, 12
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# CHECK: stbepx 13, 14, 15 # encoding: [0x7d,0xae,0x79,0xbe]
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stbepx 13, 14, 15
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# CHECK: stfdepx 16, 17, 18 # encoding: [0x7e,0x11,0x95,0xbe]
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stfdepx 16, 17, 18
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# CHECK: sthepx 19, 20, 21 # encoding: [0x7e,0x74,0xab,0x3e]
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sthepx 19, 20, 21
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# CHECK: stwepx 22, 23, 24 # encoding: [0x7e,0xd7,0xc1,0x3e]
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stwepx 22, 23, 24
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# CHECK: dcbfep 25, 26 # encoding: [0x7c,0x19,0xd0,0xfe]
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dcbfep 25, 26
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# CHECK: dcbstep 27, 28 # encoding: [0x7c,0x1b,0xe0,0x7e]
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dcbstep 27, 28
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# CHECK: dcbtep 29, 30, 31 # encoding: [0x7f,0xbe,0xfa,0x7e]
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dcbtep 29, 30, 31
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# CHECK: dcbtstep 0, 1, 2 # encoding: [0x7c,0x01,0x11,0xfe]
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dcbtstep 0, 1, 2
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# CHECK: dcbzep 3, 4 # encoding: [0x7c,0x03,0x27,0xfe]
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dcbzep 3, 4
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# CHECK: dcbzlep 5, 6 # encoding: [0x7c,0x25,0x37,0xfe]
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dcbzlep 5, 6
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# CHECK: icbiep 7, 8 # encoding: [0x7c,0x07,0x47,0xbe]
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icbiep 7, 8
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