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[AArch64][GlobalISel] Emit G_ASSERT_ZEXT in assignValueToReg 

When we have a zeroext parameter, emit G_ASSERT_ZEXT.

Add a check that we actually emit it.

This is a 0.1% code size win on CTMark/7zip and CTMark/consumer-typeset at -Os.

Differential Revision: https://reviews.llvm.org/D95567
This commit is contained in:
Jessica Paquette 2021-01-27 14:14:35 -08:00
parent 7f2e0879b5
commit cf2be5e3bb
2 changed files with 49 additions and 1 deletions
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10
llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
View File

@ -74,8 +74,16 @@ struct IncomingArgHandler : public CallLowering::IncomingValueHandler {
default:
MIRBuilder.buildCopy(ValVReg, PhysReg);
break;
case CCValAssign::LocInfo::ZExt: {
auto WideTy = LLT{VA.getLocVT()};
auto NarrowTy = MRI.getType(ValVReg);
MIRBuilder.buildTrunc(ValVReg,
MIRBuilder.buildAssertZExt(
WideTy, MIRBuilder.buildCopy(WideTy, PhysReg),
NarrowTy.getSizeInBits()));
break;
}
case CCValAssign::LocInfo::SExt:
case CCValAssign::LocInfo::ZExt:
case CCValAssign::LocInfo::AExt: {
auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg);
MIRBuilder.buildTrunc(ValVReg, Copy);

40
llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll Normal file
View File

@ -0,0 +1,40 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -mtriple=aarch64 -global-isel -stop-after=irtranslator -verify-machineinstrs -o - %s | FileCheck %s
; Verify that we generate G_ASSERT_ZEXT for zeroext parameters.
define i8 @zeroext_param_i8(i8 zeroext %x) {
; CHECK-LABEL: name: zeroext_param_i8
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY]], 8
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ASSERT_ZEXT]](s32)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
; CHECK: $w0 = COPY [[ANYEXT]](s32)
; CHECK: RET_ReallyLR implicit $w0
ret i8 %x
}
define i8 @no_zeroext_param(i8 %x) {
; CHECK-LABEL: name: no_zeroext_param
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
; CHECK: $w0 = COPY [[ANYEXT]](s32)
; CHECK: RET_ReallyLR implicit $w0
ret i8 %x
}
; Don't need G_ASSERT_ZEXT here. The sizes match.
define i32 @zeroext_param_i32(i32 zeroext %x) {
; CHECK-LABEL: name: zeroext_param_i32
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: $w0 = COPY [[COPY]](s32)
; CHECK: RET_ReallyLR implicit $w0
ret i32 %x
}