forked from OSchip/llvm-project
[PowerPC] multiply-with-overflow might use the CTR register
Check the legality of ISD::[US]MULO to see whether Intrinsic::[us]mul_with_overflow will legalize into a function call (and, thus, will use the CTR register). Fixes PR32485. Patch by Tim Neumann! Differential Revision: https://reviews.llvm.org/D31790 llvm-svn: 299910
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@ -307,6 +307,8 @@ bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
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case Intrinsic::round: Opcode = ISD::FROUND; break;
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case Intrinsic::minnum: Opcode = ISD::FMINNUM; break;
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case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break;
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case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO; break;
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case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO; break;
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}
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}
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@ -0,0 +1,34 @@
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; RUN: llc -O1 -verify-machineinstrs < %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: uwtable
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define fastcc void @_Crash_Fn() unnamed_addr #0 {
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entry-block:
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br label %_Label_0
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_Label_0: ; preds = %_Label_0, %entry-block
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%result.0138 = phi i128 [ %5, %_Label_0 ], [ 0, %entry-block ]
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%iter.sroa.0.0137 = phi i8* [ %0, %_Label_0 ], [ undef, %entry-block ]
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%0 = getelementptr inbounds i8, i8* %iter.sroa.0.0137, i64 1
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%1 = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %result.0138, i128 undef) #2
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%2 = extractvalue { i128, i1 } %1, 0
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%3 = tail call { i128, i1 } @llvm.sadd.with.overflow.i128(i128 %2, i128 0) #2
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%4 = extractvalue { i128, i1 } %3, 1
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%5 = extractvalue { i128, i1 } %3, 0
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%6 = icmp eq i8* %0, null
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br i1 %6, label %bb66.loopexit, label %_Label_0
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bb66.loopexit: ; preds = %_Label_0
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unreachable
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}
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; Function Attrs: nounwind readnone
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declare { i128, i1 } @llvm.sadd.with.overflow.i128(i128, i128) #1
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; Function Attrs: nounwind readnone
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declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128) #1
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attributes #0 = { uwtable }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind }
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