forked from OSchip/llvm-project
vectorizer: Add support for reading and writing from the same memory location.
llvm-svn: 166255
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282c92a708
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@ -715,6 +715,7 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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ValueVector Reads;
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ValueVector Writes;
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SmallPtrSet<Value*, 16> AnalyzedPtrs;
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unsigned NumPhis = 0;
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for (BasicBlock::iterator it = BB.begin(), e = BB.end(); it != e; ++it) {
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Instruction *I = it;
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@ -766,7 +767,10 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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DEBUG(dbgs() << "LV: Found a non-simple load.\n");
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return false;
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}
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GetUnderlyingObjects(Ld->getPointerOperand(), Reads, DL);
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Value* Ptr = Ld->getPointerOperand();
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if (AnalyzedPtrs.insert(Ptr))
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GetUnderlyingObjects(Ptr, Reads, DL);
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}
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// Record store pointers. Abort on all other instructions that write to
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@ -778,7 +782,10 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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DEBUG(dbgs() << "LV: Found a non-simple store.\n");
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return false;
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}
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GetUnderlyingObjects(St->getPointerOperand(), Writes, DL);
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Value* Ptr = St->getPointerOperand();
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if (AnalyzedPtrs.insert(Ptr))
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GetUnderlyingObjects(St->getPointerOperand(), Writes, DL);
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}
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// We still don't handle functions.
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@ -0,0 +1,35 @@
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; RUN: opt < %s -loop-vectorize -dce -instcombine -licm -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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@a = common global [2048 x i32] zeroinitializer, align 16
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; This is the loop.
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; for (i=0; i<n; i++){
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; a[i] += i;
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; }
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;CHECK: @inc
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;CHECK: load <4 x i32>
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;CHECK: add <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @inc(i32 %n) nounwind uwtable noinline ssp {
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%1 = icmp sgt i32 %n, 0
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br i1 %1, label %.lr.ph, label %._crit_edge
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.lr.ph: ; preds = %0, %.lr.ph
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%indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
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%2 = getelementptr inbounds [2048 x i32]* @a, i64 0, i64 %indvars.iv
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%3 = load i32* %2, align 4
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%4 = trunc i64 %indvars.iv to i32
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%5 = add nsw i32 %3, %4
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store i32 %5, i32* %2, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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