[CodeGen] Make MachineInstrBuilder::copyImplicitOps const. NFC.

This matches the other MIB methods, none of which modify the builder.
Without this, we can't chain copyImplicitOps.
Also reformat the few users, in PPCEarlyReturn.

llvm-svn: 255828
This commit is contained in:
Ahmed Bougacha 2015-12-16 22:15:30 +00:00
parent 17d6086a13
commit cecb6b0865
2 changed files with 13 additions and 14 deletions

View File

@ -222,7 +222,8 @@ public:
}
/// Copy all the implicit operands from OtherMI onto this one.
const MachineInstrBuilder &copyImplicitOps(const MachineInstr *OtherMI) {
const MachineInstrBuilder &
copyImplicitOps(const MachineInstr *OtherMI) const {
MI->copyImplicitOps(*MF, OtherMI);
return *this;
}

View File

@ -79,14 +79,12 @@ protected:
if (J == (*PI)->end())
break;
MachineInstrBuilder MIB;
if (J->getOpcode() == PPC::B) {
if (J->getOperand(0).getMBB() == &ReturnMBB) {
// This is an unconditional branch to the return. Replace the
// branch with a blr.
MIB =
BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode()));
MIB.copyImplicitOps(I);
BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode()))
.copyImplicitOps(I);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
BlockChanged = true;
@ -97,10 +95,10 @@ protected:
if (J->getOperand(2).getMBB() == &ReturnMBB) {
// This is a conditional branch to the return. Replace the branch
// with a bclr.
MIB = BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
.addImm(J->getOperand(0).getImm())
.addReg(J->getOperand(1).getReg());
MIB.copyImplicitOps(I);
BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
.addImm(J->getOperand(0).getImm())
.addReg(J->getOperand(1).getReg())
.copyImplicitOps(I);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
BlockChanged = true;
@ -111,11 +109,11 @@ protected:
if (J->getOperand(1).getMBB() == &ReturnMBB) {
// This is a conditional branch to the return. Replace the branch
// with a bclr.
MIB = BuildMI(**PI, J, J->getDebugLoc(),
TII->get(J->getOpcode() == PPC::BC ?
PPC::BCLR : PPC::BCLRn))
.addReg(J->getOperand(0).getReg());
MIB.copyImplicitOps(I);
BuildMI(
**PI, J, J->getDebugLoc(),
TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn))
.addReg(J->getOperand(0).getReg())
.copyImplicitOps(I);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
BlockChanged = true;