forked from OSchip/llvm-project
[AArch64] Update test case to pass with post-RA MI scheduler.
Check that the post RA scheduler is being skipped, regardless of whether it's the top-down list latency scheduler or the post-RA MI scheduler. llvm-svn: 217725
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@ -46,7 +46,7 @@ attributes #0 = { optnone noinline }
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; LLC-Ox-DAG: Skipping pass 'Merge disjoint stack slots'
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; LLC-Ox-DAG: Skipping pass 'Optimize machine instruction PHIs'
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; LLC-Ox-DAG: Skipping pass 'Peephole Optimizations'
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; LLC-Ox-DAG: Skipping pass 'Post RA top-down list latency scheduler'
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; LLC-Ox-DAG: Skipping pass 'Post{{.*}}RA{{.*}}{{[Ss]}}cheduler'
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; LLC-Ox-DAG: Skipping pass 'Remove dead machine instructions'
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; LLC-Ox-DAG: Skipping pass 'Tail Duplication'
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