[CodeGen] Use MachineInstr::operands (NFC)

This commit is contained in:
Kazu Hirata 2021-11-11 07:10:30 -08:00
parent b241226aec
commit ce227ce3b3
5 changed files with 28 additions and 42 deletions

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@ -1592,10 +1592,7 @@ void LiveIntervals::repairOldRegInRange(const MachineBasicBlock::iterator Begin,
// FIXME: This doesn't currently handle early-clobber or multiple removed // FIXME: This doesn't currently handle early-clobber or multiple removed
// defs inside of the region to repair. // defs inside of the region to repair.
for (MachineInstr::mop_iterator OI = MI.operands_begin(), for (const MachineOperand &MO : MI.operands()) {
OE = MI.operands_end();
OI != OE; ++OI) {
const MachineOperand &MO = *OI;
if (!MO.isReg() || MO.getReg() != Reg) if (!MO.isReg() || MO.getReg() != Reg)
continue; continue;
@ -1680,15 +1677,13 @@ LiveIntervals::repairIntervalsInRange(MachineBasicBlock *MBB,
MachineInstr &MI = *I; MachineInstr &MI = *I;
if (MI.isDebugOrPseudoInstr()) if (MI.isDebugOrPseudoInstr())
continue; continue;
for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(), for (const MachineOperand &MO : MI.operands()) {
MOE = MI.operands_end(); if (MO.isReg() && MO.getReg().isVirtual()) {
MOI != MOE; ++MOI) { Register Reg = MO.getReg();
if (MOI->isReg() && MOI->getReg().isVirtual()) {
Register Reg = MOI->getReg();
// If the new instructions refer to subregs but the old instructions did // If the new instructions refer to subregs but the old instructions did
// not, throw away any old live interval so it will be recomputed with // not, throw away any old live interval so it will be recomputed with
// subranges. // subranges.
if (MOI->getSubReg() && hasInterval(Reg) && if (MO.getSubReg() && hasInterval(Reg) &&
!getInterval(Reg).hasSubRanges() && !getInterval(Reg).hasSubRanges() &&
MRI->shouldTrackSubRegLiveness(Reg)) MRI->shouldTrackSubRegLiveness(Reg))
removeInterval(Reg); removeInterval(Reg);

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@ -308,16 +308,15 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
bool HasLiveVRegUses = false; bool HasLiveVRegUses = false;
// Check for live intervals that may shrink // Check for live intervals that may shrink
for (MachineInstr::mop_iterator MOI = MI->operands_begin(), for (const MachineOperand &MO : MI->operands()) {
MOE = MI->operands_end(); MOI != MOE; ++MOI) { if (!MO.isReg())
if (!MOI->isReg())
continue; continue;
Register Reg = MOI->getReg(); Register Reg = MO.getReg();
if (!Register::isVirtualRegister(Reg)) { if (!Register::isVirtualRegister(Reg)) {
// Check if MI reads any unreserved physregs. // Check if MI reads any unreserved physregs.
if (Reg && MOI->readsReg() && !MRI.isReserved(Reg)) if (Reg && MO.readsReg() && !MRI.isReserved(Reg))
ReadsPhysRegs = true; ReadsPhysRegs = true;
else if (MOI->isDef()) else if (MO.isDef())
LIS.removePhysRegDefAt(Reg.asMCReg(), Idx); LIS.removePhysRegDefAt(Reg.asMCReg(), Idx);
continue; continue;
} }
@ -327,14 +326,14 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
// unlikely to change anything. We typically don't want to shrink the // unlikely to change anything. We typically don't want to shrink the
// PIC base register that has lots of uses everywhere. // PIC base register that has lots of uses everywhere.
// Always shrink COPY uses that probably come from live range splitting. // Always shrink COPY uses that probably come from live range splitting.
if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) || if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MO.isDef())) ||
(MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI)))) (MO.readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, MO))))
ToShrink.insert(&LI); ToShrink.insert(&LI);
else if (MOI->readsReg()) else if (MO.readsReg())
HasLiveVRegUses = true; HasLiveVRegUses = true;
// Remove defined value. // Remove defined value.
if (MOI->isDef()) { if (MO.isDef()) {
if (TheDelegate && LI.getVNInfoAt(Idx) != nullptr) if (TheDelegate && LI.getVNInfoAt(Idx) != nullptr)
TheDelegate->LRE_WillShrinkVirtReg(LI.reg()); TheDelegate->LRE_WillShrinkVirtReg(LI.reg());
LIS.removeVRegDefAt(LI, Idx); LIS.removeVRegDefAt(LI, Idx);

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@ -1042,17 +1042,16 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
I != E; ++I) { I != E; ++I) {
MachineInstr *MI = &*I; MachineInstr *MI = &*I;
for (MachineInstr::mop_iterator OI = MI->operands_begin(), for (MachineOperand &MO : MI->operands()) {
OE = MI->operands_end(); OI != OE; ++OI) { if (!MO.isReg() || MO.getReg() == 0 || !MO.isUse() || !MO.isKill() ||
if (!OI->isReg() || OI->getReg() == 0 || MO.isUndef())
!OI->isUse() || !OI->isKill() || OI->isUndef())
continue; continue;
Register Reg = OI->getReg(); Register Reg = MO.getReg();
if (Register::isPhysicalRegister(Reg) || if (Register::isPhysicalRegister(Reg) ||
LV->getVarInfo(Reg).removeKill(*MI)) { LV->getVarInfo(Reg).removeKill(*MI)) {
KilledRegs.push_back(Reg); KilledRegs.push_back(Reg);
LLVM_DEBUG(dbgs() << "Removing terminator kill: " << *MI); LLVM_DEBUG(dbgs() << "Removing terminator kill: " << MI);
OI->setIsKill(false); MO.setIsKill(false);
} }
} }
} }
@ -1063,12 +1062,11 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
I != E; ++I) { I != E; ++I) {
MachineInstr *MI = &*I; MachineInstr *MI = &*I;
for (MachineInstr::mop_iterator OI = MI->operands_begin(), for (const MachineOperand &MO : MI->operands()) {
OE = MI->operands_end(); OI != OE; ++OI) { if (!MO.isReg() || MO.getReg() == 0)
if (!OI->isReg() || OI->getReg() == 0)
continue; continue;
Register Reg = OI->getReg(); Register Reg = MO.getReg();
if (!is_contained(UsedRegs, Reg)) if (!is_contained(UsedRegs, Reg))
UsedRegs.push_back(Reg); UsedRegs.push_back(Reg);
} }

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@ -713,15 +713,13 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB,
continue; continue;
} }
bool used = true; bool used = true;
for (MachineInstr::mop_iterator MOI = MI->operands_begin(), for (const MachineOperand &MO : MI->operands()) {
MOE = MI->operands_end(); if (!MO.isReg() || !MO.isDef())
MOI != MOE; ++MOI) {
if (!MOI->isReg() || !MOI->isDef())
continue; continue;
Register reg = MOI->getReg(); Register reg = MO.getReg();
// Assume physical registers are used, unless they are marked dead. // Assume physical registers are used, unless they are marked dead.
if (Register::isPhysicalRegister(reg)) { if (Register::isPhysicalRegister(reg)) {
used = !MOI->isDead(); used = !MO.isDead();
if (used) if (used)
break; break;
continue; continue;

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@ -542,11 +542,7 @@ void VirtRegRewriter::rewrite() {
MBBI != MBBE; ++MBBI) { MBBI != MBBE; ++MBBI) {
LLVM_DEBUG(MBBI->print(dbgs(), Indexes)); LLVM_DEBUG(MBBI->print(dbgs(), Indexes));
for (MachineInstr &MI : llvm::make_early_inc_range(MBBI->instrs())) { for (MachineInstr &MI : llvm::make_early_inc_range(MBBI->instrs())) {
for (MachineInstr::mop_iterator MOI = MI.operands_begin(), for (MachineOperand &MO : MI.operands()) {
MOE = MI.operands_end();
MOI != MOE; ++MOI) {
MachineOperand &MO = *MOI;
// Make sure MRI knows about registers clobbered by regmasks. // Make sure MRI knows about registers clobbered by regmasks.
if (MO.isRegMask()) if (MO.isRegMask())
MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());