forked from OSchip/llvm-project
[CodeGen] Use MachineInstr::operands (NFC)
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b241226aec
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ce227ce3b3
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@ -1592,10 +1592,7 @@ void LiveIntervals::repairOldRegInRange(const MachineBasicBlock::iterator Begin,
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// FIXME: This doesn't currently handle early-clobber or multiple removed
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// FIXME: This doesn't currently handle early-clobber or multiple removed
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// defs inside of the region to repair.
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// defs inside of the region to repair.
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for (MachineInstr::mop_iterator OI = MI.operands_begin(),
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for (const MachineOperand &MO : MI.operands()) {
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OE = MI.operands_end();
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OI != OE; ++OI) {
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const MachineOperand &MO = *OI;
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if (!MO.isReg() || MO.getReg() != Reg)
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if (!MO.isReg() || MO.getReg() != Reg)
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continue;
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continue;
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@ -1680,15 +1677,13 @@ LiveIntervals::repairIntervalsInRange(MachineBasicBlock *MBB,
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MachineInstr &MI = *I;
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MachineInstr &MI = *I;
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if (MI.isDebugOrPseudoInstr())
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if (MI.isDebugOrPseudoInstr())
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continue;
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continue;
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for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(),
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for (const MachineOperand &MO : MI.operands()) {
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MOE = MI.operands_end();
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if (MO.isReg() && MO.getReg().isVirtual()) {
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MOI != MOE; ++MOI) {
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Register Reg = MO.getReg();
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if (MOI->isReg() && MOI->getReg().isVirtual()) {
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Register Reg = MOI->getReg();
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// If the new instructions refer to subregs but the old instructions did
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// If the new instructions refer to subregs but the old instructions did
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// not, throw away any old live interval so it will be recomputed with
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// not, throw away any old live interval so it will be recomputed with
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// subranges.
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// subranges.
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if (MOI->getSubReg() && hasInterval(Reg) &&
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if (MO.getSubReg() && hasInterval(Reg) &&
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!getInterval(Reg).hasSubRanges() &&
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!getInterval(Reg).hasSubRanges() &&
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MRI->shouldTrackSubRegLiveness(Reg))
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MRI->shouldTrackSubRegLiveness(Reg))
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removeInterval(Reg);
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removeInterval(Reg);
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@ -308,16 +308,15 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
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bool HasLiveVRegUses = false;
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bool HasLiveVRegUses = false;
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// Check for live intervals that may shrink
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// Check for live intervals that may shrink
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for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
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for (const MachineOperand &MO : MI->operands()) {
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MOE = MI->operands_end(); MOI != MOE; ++MOI) {
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if (!MO.isReg())
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if (!MOI->isReg())
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continue;
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continue;
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Register Reg = MOI->getReg();
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Register Reg = MO.getReg();
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if (!Register::isVirtualRegister(Reg)) {
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if (!Register::isVirtualRegister(Reg)) {
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// Check if MI reads any unreserved physregs.
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// Check if MI reads any unreserved physregs.
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if (Reg && MOI->readsReg() && !MRI.isReserved(Reg))
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if (Reg && MO.readsReg() && !MRI.isReserved(Reg))
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ReadsPhysRegs = true;
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ReadsPhysRegs = true;
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else if (MOI->isDef())
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else if (MO.isDef())
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LIS.removePhysRegDefAt(Reg.asMCReg(), Idx);
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LIS.removePhysRegDefAt(Reg.asMCReg(), Idx);
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continue;
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continue;
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}
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}
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@ -327,14 +326,14 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
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// unlikely to change anything. We typically don't want to shrink the
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// unlikely to change anything. We typically don't want to shrink the
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// PIC base register that has lots of uses everywhere.
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// PIC base register that has lots of uses everywhere.
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// Always shrink COPY uses that probably come from live range splitting.
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// Always shrink COPY uses that probably come from live range splitting.
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if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) ||
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if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MO.isDef())) ||
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(MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI))))
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(MO.readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, MO))))
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ToShrink.insert(&LI);
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ToShrink.insert(&LI);
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else if (MOI->readsReg())
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else if (MO.readsReg())
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HasLiveVRegUses = true;
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HasLiveVRegUses = true;
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// Remove defined value.
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// Remove defined value.
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if (MOI->isDef()) {
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if (MO.isDef()) {
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if (TheDelegate && LI.getVNInfoAt(Idx) != nullptr)
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if (TheDelegate && LI.getVNInfoAt(Idx) != nullptr)
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TheDelegate->LRE_WillShrinkVirtReg(LI.reg());
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TheDelegate->LRE_WillShrinkVirtReg(LI.reg());
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LIS.removeVRegDefAt(LI, Idx);
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LIS.removeVRegDefAt(LI, Idx);
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@ -1042,17 +1042,16 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
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for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
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for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
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I != E; ++I) {
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I != E; ++I) {
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MachineInstr *MI = &*I;
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MachineInstr *MI = &*I;
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for (MachineInstr::mop_iterator OI = MI->operands_begin(),
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for (MachineOperand &MO : MI->operands()) {
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OE = MI->operands_end(); OI != OE; ++OI) {
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if (!MO.isReg() || MO.getReg() == 0 || !MO.isUse() || !MO.isKill() ||
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if (!OI->isReg() || OI->getReg() == 0 ||
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MO.isUndef())
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!OI->isUse() || !OI->isKill() || OI->isUndef())
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continue;
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continue;
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Register Reg = OI->getReg();
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Register Reg = MO.getReg();
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if (Register::isPhysicalRegister(Reg) ||
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if (Register::isPhysicalRegister(Reg) ||
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LV->getVarInfo(Reg).removeKill(*MI)) {
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LV->getVarInfo(Reg).removeKill(*MI)) {
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KilledRegs.push_back(Reg);
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KilledRegs.push_back(Reg);
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LLVM_DEBUG(dbgs() << "Removing terminator kill: " << *MI);
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LLVM_DEBUG(dbgs() << "Removing terminator kill: " << MI);
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OI->setIsKill(false);
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MO.setIsKill(false);
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}
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}
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}
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}
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}
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}
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@ -1063,12 +1062,11 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
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I != E; ++I) {
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I != E; ++I) {
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MachineInstr *MI = &*I;
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MachineInstr *MI = &*I;
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for (MachineInstr::mop_iterator OI = MI->operands_begin(),
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for (const MachineOperand &MO : MI->operands()) {
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OE = MI->operands_end(); OI != OE; ++OI) {
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if (!MO.isReg() || MO.getReg() == 0)
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if (!OI->isReg() || OI->getReg() == 0)
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continue;
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continue;
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Register Reg = OI->getReg();
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Register Reg = MO.getReg();
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if (!is_contained(UsedRegs, Reg))
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if (!is_contained(UsedRegs, Reg))
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UsedRegs.push_back(Reg);
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UsedRegs.push_back(Reg);
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}
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}
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@ -713,15 +713,13 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB,
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continue;
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continue;
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}
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}
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bool used = true;
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bool used = true;
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for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
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for (const MachineOperand &MO : MI->operands()) {
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MOE = MI->operands_end();
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if (!MO.isReg() || !MO.isDef())
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MOI != MOE; ++MOI) {
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if (!MOI->isReg() || !MOI->isDef())
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continue;
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continue;
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Register reg = MOI->getReg();
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Register reg = MO.getReg();
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// Assume physical registers are used, unless they are marked dead.
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// Assume physical registers are used, unless they are marked dead.
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if (Register::isPhysicalRegister(reg)) {
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if (Register::isPhysicalRegister(reg)) {
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used = !MOI->isDead();
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used = !MO.isDead();
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if (used)
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if (used)
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break;
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break;
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continue;
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continue;
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@ -542,11 +542,7 @@ void VirtRegRewriter::rewrite() {
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MBBI != MBBE; ++MBBI) {
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MBBI != MBBE; ++MBBI) {
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LLVM_DEBUG(MBBI->print(dbgs(), Indexes));
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LLVM_DEBUG(MBBI->print(dbgs(), Indexes));
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for (MachineInstr &MI : llvm::make_early_inc_range(MBBI->instrs())) {
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for (MachineInstr &MI : llvm::make_early_inc_range(MBBI->instrs())) {
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for (MachineInstr::mop_iterator MOI = MI.operands_begin(),
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for (MachineOperand &MO : MI.operands()) {
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MOE = MI.operands_end();
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MOI != MOE; ++MOI) {
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MachineOperand &MO = *MOI;
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// Make sure MRI knows about registers clobbered by regmasks.
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// Make sure MRI knows about registers clobbered by regmasks.
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if (MO.isRegMask())
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if (MO.isRegMask())
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MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
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MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
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