[AArch64][GlobalISel] Add more specific debug info tests for 613f12dd8e.

As requested, these tests check for specific debug locs on the output of the
legalizer. The only one that I couldn't write was for moreElementsVector, which
AFAICT we don't trigger on AArch64.

llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr-debugloc.mir

@@ -0,0 +1,52 @@
+# RUN: llc -mtriple=aarch64-- -run-pass=legalizer -verify-machineinstrs -O0 %s -o - | FileCheck %s
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios13.0.0"
+
+  define void @test_debugloc() {
+    ret void
+  }
+
+  !llvm.module.flags = !{!0, !1, !2, !3, !4}
+  !llvm.dbg.cu = !{!5}
+  !llvm.ident = !{!8}
+
+  !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 0]}
+  !1 = !{i32 7, !"Dwarf Version", i32 4}
+  !2 = !{i32 2, !"Debug Info Version", i32 3}
+  !3 = !{i32 1, !"wchar_size", i32 4}
+  !4 = !{i32 7, !"PIC Level", i32 2}
+  !5 = distinct !DICompileUnit(language: DW_LANG_C99, file: !6, producer: "clang")
+  !6 = !DIFile(filename: "foo.c", directory: "/")
+  !7 = !{}
+  !8 = !{!"clang"}
+  !9 = distinct !DISubprogram(name: "test_debugloc", scope: !6, file: !6, line: 3, type: !10, scopeLine: 3, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !5, retainedNodes: !7)
+  !10 = !DISubroutineType(types: !7)
+  !11 = !DILocation(line: 4, column: 3, scope: !9)
+  !12 = !DILocation(line: 5, column: 1, scope: !9)
+
+...
+---
+name:            test_debugloc
+alignment:       4
+tracksRegLiveness: true
+liveins:
+  - { reg: '$x0' }
+  - { reg: '$q0' }
+body:             |
+  bb.1:
+    liveins: $q0, $x0
+
+    ; CHECK-LABEL: name: test_debugloc
+    ; CHECK: liveins: $q0, $x0
+    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
+    ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[COPY]](<2 x p0>), debug-location !DILocation(line: 4, column: 3
+    ; CHECK: G_STORE [[BITCAST]](<2 x s64>), [[COPY1]](p0), debug-location !DILocation(line: 4, column: 3
+    ; CHECK: RET_ReallyLR debug-location !DILocation(line: 5, column: 1
+    %0:_(<2 x p0>) = COPY $q0
+    %1:_(p0) = COPY $x0
+    G_STORE %0(<2 x p0>), %1(p0), debug-location !11 :: (store 16)
+    RET_ReallyLR debug-location !12
+
+...

llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir

@@ -0,0 +1,60 @@
+# RUN: llc -mtriple=aarch64-- -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios13.0.0"
+
+  define void @test_memset_debug(i8* %ptr, i32 %c, i32 %len) local_unnamed_addr!dbg !9 {
+  entry:
+    %conv = zext i32 %len to i64, !dbg !11
+    %0 = trunc i32 %c to i8, !dbg !11
+    call void @llvm.memset.p0i8.i64(i8* align 1 %ptr, i8 %0, i64 %conv, i1 false) #3, !dbg !11
+    ret void, !dbg !12
+  }
+
+  declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
+  attributes #1 = { argmemonly nounwind willreturn writeonly }
+
+  !llvm.module.flags = !{!0, !1, !2, !3, !4}
+  !llvm.dbg.cu = !{!5}
+  !llvm.ident = !{!8}
+
+  !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 0]}
+  !1 = !{i32 7, !"Dwarf Version", i32 4}
+  !2 = !{i32 2, !"Debug Info Version", i32 3}
+  !3 = !{i32 1, !"wchar_size", i32 4}
+  !4 = !{i32 7, !"PIC Level", i32 2}
+  !5 = distinct !DICompileUnit(language: DW_LANG_C99, file: !6, producer: "clang")
+  !6 = !DIFile(filename: "foo.c", directory: "/")
+  !7 = !{}
+  !8 = !{!"clang"}
+  !9 = distinct !DISubprogram(name: "test_memset_debug", scope: !6, file: !6, line: 3, type: !10, scopeLine: 3, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !5, retainedNodes: !7)
+  !10 = !DISubroutineType(types: !7)
+  !11 = !DILocation(line: 4, column: 3, scope: !9)
+  !12 = !DILocation(line: 5, column: 1, scope: !9)
+
+...
+---
+name:            test_memset_debug
+alignment:       4
+tracksRegLiveness: true
+liveins:
+  - { reg: '$x0' }
+  - { reg: '$w1' }
+  - { reg: '$w2' }
+body:             |
+  bb.1.entry:
+    liveins: $w1, $w2, $x0
+
+    ; We're checking that the BL call has the debug loc of the original intrinsic call.
+    ; CHECK-LABEL: name: test_memset_debug
+    ; CHECK: BL &memset, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $w1, implicit $x2, debug-location !11
+    ; CHECK: RET_ReallyLR debug-location !12
+    %0:_(p0) = COPY $x0
+    %1:_(s32) = COPY $w1
+    %2:_(s32) = COPY $w2
+    %3:_(s64) = G_ZEXT %2(s32), debug-location !11
+    %4:_(s8) = G_TRUNC %1(s32), debug-location !11
+    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %4(s8), %3(s64), 0, debug-location !11 :: (store 1 into %ir.ptr)
+    RET_ReallyLR debug-location !12
+
+...

llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir

@@ -0,0 +1,58 @@
+# RUN: llc -mtriple=aarch64-- -run-pass=legalizer -verify-machineinstrs -O0 %s -o - | FileCheck %s
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios13.0.0"
+
+  define void @test_shl_imm_promote_debug() {
+    ret void
+  }
+
+  !llvm.module.flags = !{!0, !1, !2, !3, !4}
+  !llvm.dbg.cu = !{!5}
+  !llvm.ident = !{!8}
+
+  !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 0]}
+  !1 = !{i32 7, !"Dwarf Version", i32 4}
+  !2 = !{i32 2, !"Debug Info Version", i32 3}
+  !3 = !{i32 1, !"wchar_size", i32 4}
+  !4 = !{i32 7, !"PIC Level", i32 2}
+  !5 = distinct !DICompileUnit(language: DW_LANG_C99, file: !6, producer: "clang")
+  !6 = !DIFile(filename: "foo.c", directory: "/")
+  !7 = !{}
+  !8 = !{!"clang"}
+  !9 = distinct !DISubprogram(name: "test_shl_imm_promote_debug", scope: !6, file: !6, line: 3, type: !10, scopeLine: 3, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !5, retainedNodes: !7)
+  !10 = !DISubroutineType(types: !7)
+  !11 = !DILocation(line: 4, column: 3, scope: !9)
+  !12 = !DILocation(line: 5, column: 1, scope: !9)
+
+...
+---
+name:            test_shl_imm_promote_debug
+alignment:       4
+tracksRegLiveness: true
+liveins:
+  - { reg: '$x0' }
+  - { reg: '$w1' }
+  - { reg: '$w2' }
+body:             |
+  bb.1:
+    liveins: $w0, $w1
+
+    ; Check that the G_LSHR has the right debug loc. This should also check that the G_ZEXT of the constant
+    ; also has the right DL too, but it gets optimized away.
+    ; CHECK-LABEL: name: test_shl_imm_promote_debug
+    ; CHECK: liveins: $w0, $w1
+    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s64), debug-location !DILocation(line: 4, column: 3
+    ; CHECK: $w0 = COPY [[LSHR]](s32)
+    ; CHECK: RET_ReallyLR debug-location !DILocation(line: 5, column: 1
+    %0:_(p0) = COPY $x0
+    %1:_(s32) = COPY $w1
+    %2:_(s32) = G_CONSTANT i32 8
+    %3:_(s32) = G_LSHR %1(s32), %2(s32), debug-location !11
+    $w0 = COPY %3(s32)
+    RET_ReallyLR debug-location !12
+
+...

llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir

@@ -1,10 +1,30 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -O0 -run-pass=legalizer --debugify-and-strip-all-safe --debugify-level=locations %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64--"
   define void @test_vaarg() { ret void }
+
+
+  !llvm.module.flags = !{!0, !1, !2, !3, !4}
+  !llvm.dbg.cu = !{!5}
+  !llvm.ident = !{!8}
+
+  !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 0]}
+  !1 = !{i32 7, !"Dwarf Version", i32 4}
+  !2 = !{i32 2, !"Debug Info Version", i32 3}
+  !3 = !{i32 1, !"wchar_size", i32 4}
+  !4 = !{i32 7, !"PIC Level", i32 2}
+  !5 = distinct !DICompileUnit(language: DW_LANG_C99, file: !6, producer: "clang")
+  !6 = !DIFile(filename: "foo.c", directory: "/")
+  !7 = !{}
+  !8 = !{!"clang"}
+  !9 = distinct !DISubprogram(name: "test_vaarg", scope: !6, file: !6, line: 3, type: !10, scopeLine: 3, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !5, retainedNodes: !7)
+  !10 = !DISubroutineType(types: !7)
+  !11 = !DILocation(line: 4, column: 3, scope: !9)
+  !12 = !DILocation(line: 5, column: 1, scope: !9)
+
 ...
 
 ---
@@ -13,25 +33,25 @@ body: |
   bb.0:
     ; CHECK-LABEL: name: test_vaarg
     ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
-    ; CHECK: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0) :: (load 8)
+    ; CHECK: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (load 8)
     ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
-    ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s64)
+    ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
-    ; CHECK: G_STORE [[PTR_ADD]](p0), [[COPY]](p0) :: (store 8)
+    ; CHECK: G_STORE [[PTR_ADD]](p0), [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (store 8)
-    ; CHECK: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0) :: (load 8)
+    ; CHECK: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 5, column: 1, scope: {{.*}}) :: (load 8)
-    ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD1]], [[C]](s64)
+    ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD1]], [[C]](s64), debug-location !DILocation(line: 5, column: 1, scope: {{.*}})
-    ; CHECK: G_STORE [[PTR_ADD1]](p0), [[COPY]](p0) :: (store 8)
+    ; CHECK: G_STORE [[PTR_ADD1]](p0), [[COPY]](p0), debug-location !DILocation(line: 5, column: 1, scope: {{.*}}) :: (store 8)
-    ; CHECK: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0) :: (load 8)
+    ; CHECK: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (load 8)
     ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
-    ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD2]], [[C1]](s64)
+    ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD2]], [[C1]](s64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
     ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
-    ; CHECK: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[C2]](s64)
+    ; CHECK: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[C2]](s64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
-    ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C]](s64)
+    ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C]](s64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
-    ; CHECK: G_STORE [[PTR_ADD3]](p0), [[COPY]](p0) :: (store 8)
+    ; CHECK: G_STORE [[PTR_ADD3]](p0), [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (store 8)
     %0:_(p0) = COPY $x0
 
-    %1:_(s8) = G_VAARG %0(p0), 1
+    %1:_(s8) = G_VAARG %0(p0), 1, debug-location !11
 
-    %2:_(s64) = G_VAARG %0(p0), 8
+    %2:_(s64) = G_VAARG %0(p0), 8, debug-location !12
 
-    %3:_(s64) = G_VAARG %0(p0), 16
+    %3:_(s64) = G_VAARG %0(p0), 16, debug-location !11
 ...