forked from OSchip/llvm-project
[X86] Add basic bitreverse/bswap combine tests
Shows missing SimplifyDemandedBits support llvm-svn: 353647
This commit is contained in:
Simon Pilgrim
parent
c5744d4d69
commit
ce10312986
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@ -0,0 +1,99 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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; These tests just check that the plumbing is in place for @llvm.bitreverse. The
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; actual output is massive at the moment as llvm.bitreverse is not yet legal.
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declare i32 @llvm.bitreverse.i32(i32) readnone
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declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) readnone
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; fold (bitreverse undef) -> undef
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define i32 @test_undef() nounwind {
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; X86-LABEL: test_undef:
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; X86: # %bb.0:
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; X86-NEXT: retl
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;
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; X64-LABEL: test_undef:
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; X64: # %bb.0:
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; X64-NEXT: retq
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%b = call i32 @llvm.bitreverse.i32(i32 undef)
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ret i32 %b
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}
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; fold (bitreverse (bitreverse x)) -> x
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define i32 @test_bitreverse_bitreverse(i32 %a0) nounwind {
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; X86-LABEL: test_bitreverse_bitreverse:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test_bitreverse_bitreverse:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%b = call i32 @llvm.bitreverse.i32(i32 %a0)
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%c = call i32 @llvm.bitreverse.i32(i32 %b)
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ret i32 %c
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}
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define <4 x i32> @test_demandedbits_bitreverse(<4 x i32> %a0) nounwind {
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; X86-LABEL: test_demandedbits_bitreverse:
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; X86: # %bb.0:
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; X86-NEXT: por {{\.LCPI.*}}, %xmm0
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; X86-NEXT: pxor %xmm1, %xmm1
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
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; X86-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7]
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; X86-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4]
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; X86-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X86-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
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; X86-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,7,6,5,4]
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; X86-NEXT: packuswb %xmm2, %xmm1
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; X86-NEXT: movdqa {{.*#+}} xmm0 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; X86-NEXT: movdqa %xmm1, %xmm2
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; X86-NEXT: pand %xmm0, %xmm2
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; X86-NEXT: psllw $4, %xmm2
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm1
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; X86-NEXT: psrlw $4, %xmm1
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; X86-NEXT: pand %xmm0, %xmm1
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; X86-NEXT: pandn %xmm2, %xmm0
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; X86-NEXT: por %xmm1, %xmm0
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [51,51,51,51,51,51,51,51,51,51,51,51,51,51,51,51]
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; X86-NEXT: pand %xmm0, %xmm1
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; X86-NEXT: psllw $2, %xmm1
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm1
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: psrlw $2, %xmm0
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: por %xmm1, %xmm0
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85]
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; X86-NEXT: pand %xmm0, %xmm1
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; X86-NEXT: paddb %xmm1, %xmm1
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: psrlw $1, %xmm0
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: por %xmm1, %xmm0
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; X86-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: test_demandedbits_bitreverse:
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; X64: # %bb.0:
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; X64-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
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; X64-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; X64-NEXT: vpand %xmm1, %xmm0, %xmm2
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; X64-NEXT: vmovdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
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; X64-NEXT: vpshufb %xmm2, %xmm3, %xmm2
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; X64-NEXT: vpsrlw $4, %xmm0, %xmm0
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; X64-NEXT: vpand %xmm1, %xmm0, %xmm0
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; X64-NEXT: vmovdqa {{.*#+}} xmm1 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
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; X64-NEXT: vpshufb %xmm0, %xmm1, %xmm0
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; X64-NEXT: vpor %xmm0, %xmm2, %xmm0
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; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: retq
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%b = or <4 x i32> %a0, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>
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%c = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %b)
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%d = and <4 x i32> %c, <i32 -2, i32 -2, i32 -2, i32 -2>
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ret <4 x i32> %d
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}
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@ -0,0 +1,60 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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; These tests just check that the plumbing is in place for @llvm.bswap. The
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; actual output is massive at the moment as llvm.bswap is not yet legal.
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declare i32 @llvm.bswap.i32(i32) readnone
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declare i32 @llvm.bswap.v4i32(i32) readnone
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; fold (bswap undef) -> undef
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define i32 @test_undef() nounwind {
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; X86-LABEL: test_undef:
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; X86: # %bb.0:
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; X86-NEXT: retl
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;
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; X64-LABEL: test_undef:
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; X64: # %bb.0:
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; X64-NEXT: retq
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%b = call i32 @llvm.bswap.i32(i32 undef)
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ret i32 %b
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}
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; fold (bswap (bswap x)) -> x
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define i32 @test_bswap_bswap(i32 %a0) nounwind {
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; X86-LABEL: test_bswap_bswap:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test_bswap_bswap:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%b = call i32 @llvm.bswap.i32(i32 %a0)
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%c = call i32 @llvm.bswap.i32(i32 %b)
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ret i32 %c
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}
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define i32 @test_demandedbits_bswap(i32 %a0) nounwind {
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; X86-LABEL: test_demandedbits_bswap:
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; X86: # %bb.0:
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; X86-NEXT: movl $-16777216, %eax # imm = 0xFF000000
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; X86-NEXT: orl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: bswapl %eax
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; X86-NEXT: andl $-65536, %eax # imm = 0xFFFF0000
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; X86-NEXT: retl
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;
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; X64-LABEL: test_demandedbits_bswap:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: orl $-16777216, %eax # imm = 0xFF000000
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; X64-NEXT: bswapl %eax
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; X64-NEXT: andl $-65536, %eax # imm = 0xFFFF0000
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; X64-NEXT: retq
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%b = or i32 %a0, 4278190080
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%c = call i32 @llvm.bswap.i32(i32 %b)
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%d = and i32 %c, 4294901760
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ret i32 %d
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}
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