forked from OSchip/llvm-project
ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract. Add missing tests that accidentally were not committed in rL254250. Differential Revision: http://reviews.llvm.org/D14982 llvm-svn: 254251
This commit is contained in:
Alexandros Lamprineas
parent
502592c1d4
commit
cd8d973932
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// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
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// RUN: -target-feature +v8.1a -O3 -S -o - %s \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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#include <arm_neon.h>
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// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s16
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int16x4_t test_vqrdmlah_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
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return vqrdmlah_laneq_s16(a, b, v, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s32
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int32x2_t test_vqrdmlah_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
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return vqrdmlah_laneq_s32(a, b, v, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s16
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int16x8_t test_vqrdmlahq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
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return vqrdmlahq_laneq_s16(a, b, v, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s32
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int32x4_t test_vqrdmlahq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
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return vqrdmlahq_laneq_s32(a, b, v, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahh_s16
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int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
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// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}
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return vqrdmlahh_s16(a, b, c);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahs_s32
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int32_t test_vqrdmlahs_s32(int32_t a, int32_t b, int32_t c) {
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// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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return vqrdmlahs_s32(a, b, c);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahh_lane_s16
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int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
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// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
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return vqrdmlahh_lane_s16(a, b, c, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahs_lane_s32
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int32_t test_vqrdmlahs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
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// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
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return vqrdmlahs_lane_s32(a, b, c, 1);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahh_laneq_s16
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int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
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// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
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return vqrdmlahh_laneq_s16(a, b, c, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlahs_laneq_s32
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int32_t test_vqrdmlahs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
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// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
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return vqrdmlahs_laneq_s32(a, b, c, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s16
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int16x4_t test_vqrdmlsh_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
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return vqrdmlsh_laneq_s16(a, b, v, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s32
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int32x2_t test_vqrdmlsh_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
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return vqrdmlsh_laneq_s32(a, b, v, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s16
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int16x8_t test_vqrdmlshq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
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return vqrdmlshq_laneq_s16(a, b, v, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s32
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int32x4_t test_vqrdmlshq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
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return vqrdmlshq_laneq_s32(a, b, v, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshh_s16
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int16_t test_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) {
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// CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}
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return vqrdmlshh_s16(a, b, c);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshs_s32
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int32_t test_vqrdmlshs_s32(int32_t a, int32_t b, int32_t c) {
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// CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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return vqrdmlshs_s32(a, b, c);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshh_lane_s16
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int16_t test_vqrdmlshh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
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// CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
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return vqrdmlshh_lane_s16(a, b, c, 3);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshs_lane_s32
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int32_t test_vqrdmlshs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
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// CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
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return vqrdmlshs_lane_s32(a, b, c, 1);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshh_laneq_s16
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int16_t test_vqrdmlshh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
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// CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
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return vqrdmlshh_laneq_s16(a, b, c, 7);
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}
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// CHECK-AARCH64-LABEL: test_vqrdmlshs_laneq_s32
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int32_t test_vqrdmlshs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
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// CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
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return vqrdmlshs_laneq_s32(a, b, c, 3);
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}
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@ -0,0 +1,121 @@
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// RUN: %clang_cc1 -triple armv8.1a-linux-gnu -target-feature +neon \
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// RUN: -O3 -S -o - %s \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM
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// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
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// RUN: -target-feature +v8.1a -O3 -S -o - %s \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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#include <arm_neon.h>
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// CHECK-LABEL: test_vqrdmlah_s16
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int16x4_t test_vqrdmlah_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
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return vqrdmlah_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlah_s32
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int32x2_t test_vqrdmlah_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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return vqrdmlah_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlahq_s16
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int16x8_t test_vqrdmlahq_s16(int16x8_t a, int16x8_t b, int16x8_t c) {
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// CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
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return vqrdmlahq_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlahq_s32
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int32x4_t test_vqrdmlahq_s32(int32x4_t a, int32x4_t b, int32x4_t c) {
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// CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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return vqrdmlahq_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlah_lane_s16
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int16x4_t test_vqrdmlah_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
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return vqrdmlah_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlah_lane_s32
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int32x2_t test_vqrdmlah_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
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return vqrdmlah_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlahq_lane_s16
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int16x8_t test_vqrdmlahq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
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return vqrdmlahq_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlahq_lane_s32
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int32x4_t test_vqrdmlahq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
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return vqrdmlahq_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlsh_s16
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int16x4_t test_vqrdmlsh_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
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return vqrdmlsh_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlsh_s32
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int32x2_t test_vqrdmlsh_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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return vqrdmlsh_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlshq_s16
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int16x8_t test_vqrdmlshq_s16(int16x8_t a, int16x8_t b, int16x8_t c) {
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// CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
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return vqrdmlshq_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlshq_s32
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int32x4_t test_vqrdmlshq_s32(int32x4_t a, int32x4_t b, int32x4_t c) {
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// CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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return vqrdmlshq_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlsh_lane_s16
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int16x4_t test_vqrdmlsh_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
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return vqrdmlsh_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlsh_lane_s32
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int32x2_t test_vqrdmlsh_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
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return vqrdmlsh_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlshq_lane_s16
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int16x8_t test_vqrdmlshq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
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return vqrdmlshq_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlshq_lane_s32
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int32x4_t test_vqrdmlshq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
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return vqrdmlshq_lane_s32(a, b, c, 1);
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}
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