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[mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStack 

to handle accumulator registers.

llvm-svn: 178392
This commit is contained in:
Akira Hatanaka 2013-03-30 01:08:05 +00:00
parent 3b70145184
commit cd77e15cfb
1 changed files with 18 additions and 0 deletions
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18
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
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@ -136,6 +136,12 @@ void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
else if (Mips::FGR64RegClass.contains(DestReg))
Opc = Mips::DMTC1;
}
else if (Mips::ACRegsRegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC64;
else if (Mips::ACRegsDSPRegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC_DSP;
else if (Mips::ACRegs128RegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC128;
assert(Opc && "Cannot copy registers");
@ -166,6 +172,12 @@ storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Opc = IsN64 ? Mips::SW_P8 : Mips::SW;
else if (Mips::CPU64RegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::SD_P8 : Mips::SD;
else if (Mips::ACRegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC64_P8 : Mips::STORE_AC64;
else if (Mips::ACRegsDSPRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC_DSP_P8 : Mips::STORE_AC_DSP;
else if (Mips::ACRegs128RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC128_P8 : Mips::STORE_AC128;
else if (Mips::FGR32RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::SWC1_P8 : Mips::SWC1;
else if (Mips::AFGR64RegClass.hasSubClassEq(RC))
@ -191,6 +203,12 @@ loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Opc = IsN64 ? Mips::LW_P8 : Mips::LW;
else if (Mips::CPU64RegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LD_P8 : Mips::LD;
else if (Mips::ACRegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC64_P8 : Mips::LOAD_AC64;
else if (Mips::ACRegsDSPRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC_DSP_P8 : Mips::LOAD_AC_DSP;
else if (Mips::ACRegs128RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC128_P8 : Mips::LOAD_AC128;
else if (Mips::FGR32RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LWC1_P8 : Mips::LWC1;
else if (Mips::AFGR64RegClass.hasSubClassEq(RC))