forked from OSchip/llvm-project
parent
14140059f0
commit
cd436327f1
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@ -9,6 +9,35 @@ TODO:
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Support 'update' load/store instructions. These are cracked on the G5, but are
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still a codesize win.
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With preinc enabled, this:
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long *%test4(long *%X, long *%dest) {
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%Y = getelementptr long* %X, int 4
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%A = load long* %Y
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store long %A, long* %dest
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ret long* %Y
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}
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compiles to:
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_test4:
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mr r2, r3
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lwzu r5, 32(r2)
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lwz r3, 36(r3)
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stw r5, 0(r4)
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stw r3, 4(r4)
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mr r3, r2
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blr
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with -sched=list-burr, I get:
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_test4:
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lwz r2, 36(r3)
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lwzu r5, 32(r3)
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stw r2, 4(r4)
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stw r5, 0(r4)
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blr
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===-------------------------------------------------------------------------===
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We compile the hottest inner loop of viterbi to:
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