forked from OSchip/llvm-project
parent
ee282b3160
commit
cd1f3e7a78
llvm/test/Transforms/InstCombine
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@ -1,34 +1,51 @@
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; RUN: opt -instcombine -disable-output < %s
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; RUN: opt -instsimplify -disable-output < %s
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@G1 = global i8 zeroinitializer
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define <2 x i1> @test(<2 x i8*> %a, <2 x i8*> %b) {
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%A = icmp eq <2 x i8*> %a, %b
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ret <2 x i1> %A
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; CHECK-LABEL: @test(
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; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8*> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%c = icmp eq <2 x i8*> %a, %b
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ret <2 x i1> %c
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}
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define <2 x i1> @test2(<2 x i8*> %a) {
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%A = inttoptr <2 x i32> <i32 1, i32 2> to <2 x i8*>
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%B = icmp ult <2 x i8*> %A, zeroinitializer
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ret <2 x i1> %B
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%c = inttoptr <2 x i32> <i32 1, i32 2> to <2 x i8*>
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%d = icmp ult <2 x i8*> %c, zeroinitializer
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ret <2 x i1> %d
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}
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define <2 x i1> @test3(<2 x i8*> %a) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%g = getelementptr i8, <2 x i8*> %a, <2 x i32> <i32 1, i32 0>
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%B = icmp ult <2 x i8*> %g, zeroinitializer
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ret <2 x i1> %B
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}
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define <1 x i1> @test4(<1 x i8*> %a) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: ret <1 x i1> zeroinitializer
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;
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%g = getelementptr i8, <1 x i8*> %a, <1 x i32> <i32 1>
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%B = icmp ult <1 x i8*> %g, zeroinitializer
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ret <1 x i1> %B
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}
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define <2 x i1> @test5(<2 x i8*> %a) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%w = getelementptr i8, <2 x i8*> %a, <2 x i32> zeroinitializer
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%e = getelementptr i8, <2 x i8*> %w, <2 x i32> <i32 5, i32 9>
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%g = getelementptr i8, <2 x i8*> %e, <2 x i32> <i32 1, i32 0>
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@ -37,6 +54,11 @@ define <2 x i1> @test5(<2 x i8*> %a) {
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}
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define <2 x i32*> @test7(<2 x {i32, i32}*> %a) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[W:%.*]] = getelementptr { i32, i32 }, <2 x { i32, i32 }*> [[A:%.*]], <2 x i64> <i64 5, i64 9>, <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x i32*> [[W]]
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;
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%w = getelementptr {i32, i32}, <2 x {i32, i32}*> %a, <2 x i32> <i32 5, i32 9>, <2 x i32> zeroinitializer
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ret <2 x i32*> %w
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}
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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@ -5,30 +6,39 @@ target triple = "x86_64-unknown-linux-gnu"
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define <2 x i8*> @testa(<2 x i8*> %a) {
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; CHECK-LABEL: @testa(
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; CHECK-NEXT: [[G:%.*]] = getelementptr i8, <2 x i8*> [[A:%.*]], <2 x i64> <i64 0, i64 1>
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; CHECK-NEXT: ret <2 x i8*> [[G]]
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;
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%g = getelementptr i8, <2 x i8*> %a, <2 x i32> <i32 0, i32 1>
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; CHECK: getelementptr i8, <2 x i8*> %a, <2 x i64> <i64 0, i64 1>
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ret <2 x i8*> %g
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}
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define <8 x double*> @vgep_s_v8i64(double* %a, <8 x i64>%i) {
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; CHECK-LABEL: @vgep_s_v8i64
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; CHECK: getelementptr double, double* %a, <8 x i64> %i
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; CHECK-LABEL: @vgep_s_v8i64(
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; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr double, double* [[A:%.*]], <8 x i64> [[I:%.*]]
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; CHECK-NEXT: ret <8 x double*> [[VECTORGEP]]
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;
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%VectorGep = getelementptr double, double* %a, <8 x i64> %i
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ret <8 x double*> %VectorGep
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}
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define <8 x double*> @vgep_s_v8i32(double* %a, <8 x i32>%i) {
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; CHECK-LABEL: @vgep_s_v8i32
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; CHECK: %1 = sext <8 x i32> %i to <8 x i64>
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; CHECK: getelementptr double, double* %a, <8 x i64> %1
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; CHECK-LABEL: @vgep_s_v8i32(
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; CHECK-NEXT: [[TMP1:%.*]] = sext <8 x i32> [[I:%.*]] to <8 x i64>
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; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr double, double* [[A:%.*]], <8 x i64> [[TMP1]]
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; CHECK-NEXT: ret <8 x double*> [[VECTORGEP]]
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;
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%VectorGep = getelementptr double, double* %a, <8 x i32> %i
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ret <8 x double*> %VectorGep
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}
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define <8 x i8*> @vgep_v8iPtr_i32(<8 x i8*> %a, i32 %i) {
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; CHECK-LABEL: @vgep_v8iPtr_i32
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; CHECK: %1 = sext i32 %i to i64
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; CHECK: %VectorGep = getelementptr i8, <8 x i8*> %a, i64 %1
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; CHECK-LABEL: @vgep_v8iPtr_i32(
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; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
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; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr i8, <8 x i8*> [[A:%.*]], i64 [[TMP1]]
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; CHECK-NEXT: ret <8 x i8*> [[VECTORGEP]]
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;
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%VectorGep = getelementptr i8, <8 x i8*> %a, i32 %i
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ret <8 x i8*> %VectorGep
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}
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