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[X86] Make sure we don't combine (fneg (fma X, Y, Z)) to a target specific node when there are no FMA instructions. 

This would cause a 'cannot select' error at isel when we should have emitted a lib call and an xor.

Fixes PR36553.

llvm-svn: 326393
This commit is contained in:
Craig Topper 2018-03-01 00:08:38 +00:00
parent 75c649c960
commit ccfa5257a6
2 changed files with 21 additions and 1 deletions
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2
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -35737,7 +35737,7 @@ static SDValue combineFneg(SDNode *N, SelectionDAG &DAG,
// If we're negating an FMA node, then we can adjust the
// instruction to include the extra negation.
unsigned NewOpcode = 0;
if (Arg.hasOneUse()) {
if (Arg.hasOneUse() && Subtarget.hasAnyFMA()) {
switch (Arg.getOpcode()) {
case ISD::FMA: NewOpcode = X86ISD::FNMSUB; break;
case X86ISD::FMSUB: NewOpcode = X86ISD::FNMADD; break;

20
llvm/test/CodeGen/X86/pr36553.ll Normal file
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@ -0,0 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Make sure we don't crash because we negated an fma when we didn't have any fma instructions.
define float @pr36553(float %a, float %b, float %c) nounwind {
; CHECK-LABEL: pr36553:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: callq _fmaf
; CHECK-NEXT: xorps {{.*}}(%rip), %xmm0
; CHECK-NEXT: popq %rax
; CHECK-NEXT: retq
entry:
%0 = tail call float @llvm.fma.f32(float %a, float %b, float %c)
%sub = fsub float -0.000000e+00, %0
ret float %sub
}
declare float @llvm.fma.f32(float, float, float)