forked from OSchip/llvm-project
GlobalISel: Add matcher for G_SHL
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@ -241,6 +241,12 @@ inline BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true> m_GOr(const LHS &L,
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true>(L, R);
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true>(L, R);
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}
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>
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m_GShl(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>(L, R);
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}
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template <typename LHS, typename RHS>
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>
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m_GLShr(const LHS &L, const RHS &R) {
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m_GLShr(const LHS &L, const RHS &R) {
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@ -137,6 +137,14 @@ TEST_F(AArch64GISelMITest, MatchBinaryOp) {
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EXPECT_TRUE(match);
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EXPECT_TRUE(match);
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EXPECT_EQ(Src0, Copies[0]);
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EXPECT_EQ(Src0, Copies[0]);
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EXPECT_EQ(Src1, TruncCopy1.getReg(0));
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EXPECT_EQ(Src1, TruncCopy1.getReg(0));
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// Match shl, and make sure a different shift amount type works.
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auto Shl = B.buildShl(s64, Copies[0], TruncCopy1);
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match = mi_match(Shl.getReg(0), *MRI,
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m_GShl(m_Reg(Src0), m_Reg(Src1)));
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EXPECT_TRUE(match);
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EXPECT_EQ(Src0, Copies[0]);
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EXPECT_EQ(Src1, TruncCopy1.getReg(0));
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}
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}
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TEST_F(AArch64GISelMITest, MatchICmp) {
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TEST_F(AArch64GISelMITest, MatchICmp) {
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