forked from OSchip/llvm-project
[RISCV][Clang] Add RVV Widening Integer Add/Subtract intrinsic functions.
Reviewed By: craig.topper Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Zakk Chen <zakk.chen@sifive.com> Differential Revision: https://reviews.llvm.org/D99526
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@ -200,6 +200,16 @@ class RVVBuiltin<string suffix, string prototype, string type_range,
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// Basic classes with automatic codegen.
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//===----------------------------------------------------------------------===//
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class RVVOutOp1Builtin<string suffix, string prototype, string type_range>
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: RVVBuiltin<suffix, prototype, type_range> {
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let IntrinsicTypes = [-1, 1];
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}
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class RVVOutOp0Op1Builtin<string suffix, string prototype, string type_range>
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: RVVBuiltin<suffix, prototype, type_range> {
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let IntrinsicTypes = [-1, 0, 1];
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}
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multiclass RVVBuiltinSet<string intrinsic_name, string type_range,
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list<list<string>> suffixes_prototypes,
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list<int> intrinsic_types> {
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@ -322,6 +332,58 @@ class RVVIntExt<string intrinsic_name, string suffix, string prototype,
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let IntrinsicTypes = [-1, 0];
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}
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// For widen operation which has different mangling name.
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multiclass RVVWidenBuiltinSet<string intrinsic_name, string type_range,
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list<list<string>> suffixes_prototypes> {
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let Log2LMUL = [-3, -2, -1, 0, 1, 2],
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IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask" in {
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foreach s_p = suffixes_prototypes in {
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let Name = NAME # "_" # s_p[0],
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MangledName = NAME # "_" # s_p[0] in {
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defvar suffix = s_p[1];
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defvar prototype = s_p[2];
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def : RVVOutOp0Op1Builtin<suffix, prototype, type_range>;
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}
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}
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}
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}
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// For widen operation with widen operand which has different mangling name.
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multiclass RVVWidenWOp0BuiltinSet<string intrinsic_name, string type_range,
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list<list<string>> suffixes_prototypes> {
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let Log2LMUL = [-3, -2, -1, 0, 1, 2],
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IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask" in {
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foreach s_p = suffixes_prototypes in {
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let Name = NAME # "_" # s_p[0],
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MangledName = NAME # "_" # s_p[0] in {
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defvar suffix = s_p[1];
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defvar prototype = s_p[2];
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def : RVVOutOp1Builtin<suffix, prototype, type_range>;
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}
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}
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}
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}
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multiclass RVVSignedWidenBinBuiltinSet
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: RVVWidenBuiltinSet<NAME, "csi",
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[["vv", "w", "wvv"],
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["vx", "w", "wve"]]>;
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multiclass RVVSignedWidenOp0BinBuiltinSet
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: RVVWidenWOp0BuiltinSet<NAME # "_w", "csi",
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[["wv", "w", "wwv"],
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["wx", "w", "wwe"]]>;
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multiclass RVVUnsignedWidenBinBuiltinSet
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: RVVWidenBuiltinSet<NAME, "csi",
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[["vv", "Uw", "UwUvUv"],
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["vx", "Uw", "UwUvUe"]]>;
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multiclass RVVUnsignedWidenOp0BinBuiltinSet
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: RVVWidenWOp0BuiltinSet<NAME # "_w", "csi",
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[["wv", "Uw", "UwUwUv"],
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["wx", "Uw", "UwUwUe"]]>;
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defvar TypeList = ["c","s","i","l","f","d"];
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defvar EEWList = [["8", "(Log2EEW:3)"],
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["16", "(Log2EEW:4)"],
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@ -552,7 +614,18 @@ defm vrsub : RVVOutOp1BuiltinSet<"vrsub", "csil",
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["vx", "Uv", "UvUvUe"]]>;
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// 12.2. Vector Widening Integer Add/Subtract
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// TODO
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// Widening unsigned integer add/subtract, 2*SEW = SEW +/- SEW
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defm vwaddu : RVVUnsignedWidenBinBuiltinSet;
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defm vwsubu : RVVUnsignedWidenBinBuiltinSet;
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// Widening signed integer add/subtract, 2*SEW = SEW +/- SEW
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defm vwadd : RVVSignedWidenBinBuiltinSet;
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defm vwsub : RVVSignedWidenBinBuiltinSet;
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// Widening unsigned integer add/subtract, 2*SEW = 2*SEW +/- SEW
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defm vwaddu : RVVUnsignedWidenOp0BinBuiltinSet;
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defm vwsubu : RVVUnsignedWidenOp0BinBuiltinSet;
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// Widening signed integer add/subtract, 2*SEW = 2*SEW +/- SEW
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defm vwadd : RVVSignedWidenOp0BinBuiltinSet;
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defm vwsub : RVVSignedWidenOp0BinBuiltinSet;
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// 12.3. Vector Integer Extension
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let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
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