forked from OSchip/llvm-project
parent
47ebb75cf9
commit
ccb8d5cc57
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@ -223,14 +223,14 @@ bool MachineCombiner::preservesCriticalPathLen(
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DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) {
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assert(TSchedModel.hasInstrSchedModel() && "Missing machine model\n");
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// NewRoot is the last instruction in the \p InsInstrs vector
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// Get depth and latency of NewRoot
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// NewRoot is the last instruction in the \p InsInstrs vector.
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// Get depth and latency of NewRoot.
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unsigned NewRootIdx = InsInstrs.size() - 1;
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MachineInstr *NewRoot = InsInstrs[NewRootIdx];
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unsigned NewRootDepth = getDepth(InsInstrs, InstrIdxForVirtReg, BlockTrace);
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unsigned NewRootLatency = getLatency(Root, NewRoot, BlockTrace);
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// Get depth, latency and slack of Root
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// Get depth, latency and slack of Root.
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unsigned RootDepth = BlockTrace.getInstrCycles(Root).Depth;
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unsigned RootLatency = TSchedModel.computeInstrLatency(Root);
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unsigned RootSlack = BlockTrace.getInstrSlack(Root);
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@ -284,7 +284,7 @@ bool MachineCombiner::preservesResourceLen(
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ArrayRef<const MCSchedClassDesc *> MSCInsArr = makeArrayRef(InsInstrsSC);
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ArrayRef<const MCSchedClassDesc *> MSCDelArr = makeArrayRef(DelInstrsSC);
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// Compute new resource length
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// Compute new resource length.
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unsigned ResLenAfterCombine =
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BlockTrace.getResourceLength(MBBarr, MSCInsArr, MSCDelArr);
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@ -383,7 +383,7 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
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Traces->invalidate(MBB);
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Traces->verifyAnalysis();
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// Eagerly stop after the first pattern fired
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// Eagerly stop after the first pattern fires.
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break;
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} else {
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// Cleanup instructions of the alternative code sequence. There is no
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