forked from OSchip/llvm-project
AArch64: Add backend intrinsic for rbit.
Define an intrinsic for the frontend to use and pattern match it to the RBIT instruction. rdar://9283021 llvm-svn: 211058
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@ -31,6 +31,13 @@ def int_aarch64_sdiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
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LLVMMatchType<0>], [IntrNoMem]>;
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LLVMMatchType<0>], [IntrNoMem]>;
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def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
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def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
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LLVMMatchType<0>], [IntrNoMem]>;
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LLVMMatchType<0>], [IntrNoMem]>;
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//===----------------------------------------------------------------------===//
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// RBIT
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def int_aarch64_rbit : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>],
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[IntrNoMem]>;
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -737,6 +737,10 @@ def : Pat<(not GPR64:$Xm), (ORNXrr XZR, GPR64:$Xm)>;
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defm CLS : OneOperandData<0b101, "cls">;
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defm CLS : OneOperandData<0b101, "cls">;
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defm CLZ : OneOperandData<0b100, "clz", ctlz>;
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defm CLZ : OneOperandData<0b100, "clz", ctlz>;
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defm RBIT : OneOperandData<0b000, "rbit">;
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defm RBIT : OneOperandData<0b000, "rbit">;
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def : Pat<(int_aarch64_rbit GPR32:$Rn), (RBITWr $Rn)>;
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def : Pat<(int_aarch64_rbit GPR64:$Rn), (RBITXr $Rn)>;
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def REV16Wr : OneWRegData<0b001, "rev16",
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def REV16Wr : OneWRegData<0b001, "rev16",
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UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
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UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
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def REV16Xr : OneXRegData<0b001, "rev16", null_frag>;
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def REV16Xr : OneXRegData<0b001, "rev16", null_frag>;
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