forked from OSchip/llvm-project
Make a transformation added in 63266 a bit less aggressive.
It was transforming (x&y)==y to (x&y)!=0 in the case where y is variable and known to have at most one bit set (e.g. z&1). This is not correct; the expressions are not equivalent when y==0. I believe this patch salvages what can be salvaged, including all the cases in bt.ll. Dan, please review. Fixes gcc.c-torture/execute/20040709-[12].c llvm-svn: 64314
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761b90b825
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@ -1346,20 +1346,21 @@ unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
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return 1;
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return 1;
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}
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}
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static bool ValueHasAtMostOneBitSet(SDValue Val, const SelectionDAG &DAG) {
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static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
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// Logical shift right or left won't ever introduce new set bits.
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// Logical shift right or left won't ever introduce new set bits.
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// We check for this case because we don't care which bits are
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// We check for this case because we don't care which bits are
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// set, but ComputeMaskedBits won't know anything unless it can
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// set, but ComputeMaskedBits won't know anything unless it can
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// determine which specific bits may be set.
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// determine which specific bits may be set.
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if (Val.getOpcode() == ISD::SHL || Val.getOpcode() == ISD::SRL)
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if (Val.getOpcode() == ISD::SHL || Val.getOpcode() == ISD::SRL)
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return ValueHasAtMostOneBitSet(Val.getOperand(0), DAG);
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return ValueHasExactlyOneBitSet(Val.getOperand(0), DAG);
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MVT OpVT = Val.getValueType();
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MVT OpVT = Val.getValueType();
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unsigned BitWidth = OpVT.getSizeInBits();
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unsigned BitWidth = OpVT.getSizeInBits();
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APInt Mask = APInt::getAllOnesValue(BitWidth);
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APInt Mask = APInt::getAllOnesValue(BitWidth);
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APInt KnownZero, KnownOne;
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APInt KnownZero, KnownOne;
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DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
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DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
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return KnownZero.countPopulation() == BitWidth - 1;
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return (KnownZero.countPopulation() == BitWidth - 1) &&
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(KnownOne.countPopulation() == 1);
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}
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}
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/// SimplifySetCC - Try to simplify a setcc built with the specified operands
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/// SimplifySetCC - Try to simplify a setcc built with the specified operands
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@ -1832,9 +1833,12 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
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}
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}
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// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
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// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
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// Note that where y is variable and is known to have at most
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// one bit set (for example, if it is z&1) we cannot do this;
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// the expressions are not equivalent when y==0.
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if (N0.getOpcode() == ISD::AND)
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if (N0.getOpcode() == ISD::AND)
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if (N0.getOperand(0) == N1 || N0.getOperand(1) == N1) {
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if (N0.getOperand(0) == N1 || N0.getOperand(1) == N1) {
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if (ValueHasAtMostOneBitSet(N1, DAG)) {
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if (ValueHasExactlyOneBitSet(N1, DAG)) {
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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SDValue Zero = DAG.getConstant(0, N1.getValueType());
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SDValue Zero = DAG.getConstant(0, N1.getValueType());
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return DAG.getSetCC(dl, VT, N0, Zero, Cond);
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return DAG.getSetCC(dl, VT, N0, Zero, Cond);
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@ -1842,7 +1846,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
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}
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}
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if (N1.getOpcode() == ISD::AND)
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if (N1.getOpcode() == ISD::AND)
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if (N1.getOperand(0) == N0 || N1.getOperand(1) == N0) {
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if (N1.getOperand(0) == N0 || N1.getOperand(1) == N0) {
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if (ValueHasAtMostOneBitSet(N0, DAG)) {
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if (ValueHasExactlyOneBitSet(N0, DAG)) {
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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SDValue Zero = DAG.getConstant(0, N0.getValueType());
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SDValue Zero = DAG.getConstant(0, N0.getValueType());
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return DAG.getSetCC(dl, VT, N1, Zero, Cond);
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return DAG.getSetCC(dl, VT, N1, Zero, Cond);
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@ -0,0 +1,70 @@
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; RUN: llvm-as < %s | llc -march=x86 | not grep btl
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; This tests some cases where BT must not be generated. See also bt.ll.
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; Fixes 20040709-[12].c in gcc testsuite.
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define void @test2(i32 %x, i32 %n) nounwind {
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entry:
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%tmp1 = and i32 %x, 1
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%tmp2 = urem i32 %tmp1, 15
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%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
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%tmp4 = icmp eq i32 %tmp3, %tmp2 ; <i1> [#uses=1]
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br i1 %tmp4, label %bb, label %UnifiedReturnBlock
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bb: ; preds = %entry
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call void @foo()
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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define void @test3(i32 %x, i32 %n) nounwind {
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entry:
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%tmp1 = and i32 %x, 1
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%tmp2 = urem i32 %tmp1, 15
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%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
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%tmp4 = icmp eq i32 %tmp2, %tmp3 ; <i1> [#uses=1]
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br i1 %tmp4, label %bb, label %UnifiedReturnBlock
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bb: ; preds = %entry
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call void @foo()
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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define void @test4(i32 %x, i32 %n) nounwind {
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entry:
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%tmp1 = and i32 %x, 1
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%tmp2 = urem i32 %tmp1, 15
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%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
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%tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
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br i1 %tmp4, label %bb, label %UnifiedReturnBlock
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bb: ; preds = %entry
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call void @foo()
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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define void @test5(i32 %x, i32 %n) nounwind {
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entry:
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%tmp1 = and i32 %x, 1
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%tmp2 = urem i32 %tmp1, 15
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%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
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%tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
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br i1 %tmp4, label %bb, label %UnifiedReturnBlock
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bb: ; preds = %entry
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call void @foo()
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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declare void @foo()
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