Make a transformation added in 63266 a bit less aggressive.

It was transforming (x&y)==y to (x&y)!=0 in the case where
y is variable and known to have at most one bit set (e.g. z&1).
This is not correct; the expressions are not equivalent when y==0.
I believe this patch salvages what can be salvaged, including
all the cases in bt.ll.  Dan, please review.
Fixes gcc.c-torture/execute/20040709-[12].c

llvm-svn: 64314
This commit is contained in:
Dale Johannesen 2009-02-11 19:19:41 +00:00
parent 761b90b825
commit cc5fc44d02
2 changed files with 79 additions and 5 deletions

View File

@ -1346,20 +1346,21 @@ unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
return 1; return 1;
} }
static bool ValueHasAtMostOneBitSet(SDValue Val, const SelectionDAG &DAG) { static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
// Logical shift right or left won't ever introduce new set bits. // Logical shift right or left won't ever introduce new set bits.
// We check for this case because we don't care which bits are // We check for this case because we don't care which bits are
// set, but ComputeMaskedBits won't know anything unless it can // set, but ComputeMaskedBits won't know anything unless it can
// determine which specific bits may be set. // determine which specific bits may be set.
if (Val.getOpcode() == ISD::SHL || Val.getOpcode() == ISD::SRL) if (Val.getOpcode() == ISD::SHL || Val.getOpcode() == ISD::SRL)
return ValueHasAtMostOneBitSet(Val.getOperand(0), DAG); return ValueHasExactlyOneBitSet(Val.getOperand(0), DAG);
MVT OpVT = Val.getValueType(); MVT OpVT = Val.getValueType();
unsigned BitWidth = OpVT.getSizeInBits(); unsigned BitWidth = OpVT.getSizeInBits();
APInt Mask = APInt::getAllOnesValue(BitWidth); APInt Mask = APInt::getAllOnesValue(BitWidth);
APInt KnownZero, KnownOne; APInt KnownZero, KnownOne;
DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne); DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
return KnownZero.countPopulation() == BitWidth - 1; return (KnownZero.countPopulation() == BitWidth - 1) &&
(KnownOne.countPopulation() == 1);
} }
/// SimplifySetCC - Try to simplify a setcc built with the specified operands /// SimplifySetCC - Try to simplify a setcc built with the specified operands
@ -1832,9 +1833,12 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
} }
// Simplify x&y == y to x&y != 0 if y has exactly one bit set. // Simplify x&y == y to x&y != 0 if y has exactly one bit set.
// Note that where y is variable and is known to have at most
// one bit set (for example, if it is z&1) we cannot do this;
// the expressions are not equivalent when y==0.
if (N0.getOpcode() == ISD::AND) if (N0.getOpcode() == ISD::AND)
if (N0.getOperand(0) == N1 || N0.getOperand(1) == N1) { if (N0.getOperand(0) == N1 || N0.getOperand(1) == N1) {
if (ValueHasAtMostOneBitSet(N1, DAG)) { if (ValueHasExactlyOneBitSet(N1, DAG)) {
Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true); Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
SDValue Zero = DAG.getConstant(0, N1.getValueType()); SDValue Zero = DAG.getConstant(0, N1.getValueType());
return DAG.getSetCC(dl, VT, N0, Zero, Cond); return DAG.getSetCC(dl, VT, N0, Zero, Cond);
@ -1842,7 +1846,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
} }
if (N1.getOpcode() == ISD::AND) if (N1.getOpcode() == ISD::AND)
if (N1.getOperand(0) == N0 || N1.getOperand(1) == N0) { if (N1.getOperand(0) == N0 || N1.getOperand(1) == N0) {
if (ValueHasAtMostOneBitSet(N0, DAG)) { if (ValueHasExactlyOneBitSet(N0, DAG)) {
Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true); Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
SDValue Zero = DAG.getConstant(0, N0.getValueType()); SDValue Zero = DAG.getConstant(0, N0.getValueType());
return DAG.getSetCC(dl, VT, N1, Zero, Cond); return DAG.getSetCC(dl, VT, N1, Zero, Cond);

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@ -0,0 +1,70 @@
; RUN: llvm-as < %s | llc -march=x86 | not grep btl
; This tests some cases where BT must not be generated. See also bt.ll.
; Fixes 20040709-[12].c in gcc testsuite.
define void @test2(i32 %x, i32 %n) nounwind {
entry:
%tmp1 = and i32 %x, 1
%tmp2 = urem i32 %tmp1, 15
%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, %tmp2 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @test3(i32 %x, i32 %n) nounwind {
entry:
%tmp1 = and i32 %x, 1
%tmp2 = urem i32 %tmp1, 15
%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp2, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @test4(i32 %x, i32 %n) nounwind {
entry:
%tmp1 = and i32 %x, 1
%tmp2 = urem i32 %tmp1, 15
%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @test5(i32 %x, i32 %n) nounwind {
entry:
%tmp1 = and i32 %x, 1
%tmp2 = urem i32 %tmp1, 15
%tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
declare void @foo()