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[AArch64] Bail even earlier if the instructions modifieds the base register. NFC. 

llvm-svn: 260274
This commit is contained in:
Chad Rosier 2016-02-09 20:44:41 +00:00
parent 1c44c598dd
commit cc5d61f98e
1 changed files with 6 additions and 5 deletions
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11
llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
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@ -1151,11 +1151,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
if (IsNarrowStore && Reg != AArch64::WZR) if (IsNarrowStore && Reg != AArch64::WZR)
return E; return E;
// Early exit if the first instruction modifies the base register.
// e.g., ldr x0, [x0]
if (FirstMI->modifiesRegister(BaseReg, TRI))
return E;
// Early exit if the offset is not possible to match. (6 bits of positive // Early exit if the offset is not possible to match. (6 bits of positive
// range, plus allow an extra one in case we find a later insn that matches // range, plus allow an extra one in case we find a later insn that matches
// with Offset-1) // with Offset-1)
@ -1560,6 +1555,12 @@ bool AArch64LoadStoreOpt::isCandidateToMergeOrPair(MachineInstr *MI) {
if (!getLdStOffsetOp(MI).isImm()) if (!getLdStOffsetOp(MI).isImm())
return false; return false;
// Can't merge/pair if the instruction modifies the base register.
// e.g., ldr x0, [x0]
unsigned BaseReg = getLdStBaseOp(MI).getReg();
if (MI->modifiesRegister(BaseReg, TRI))
return false;
// Check if this load/store has a hint to avoid pair formation. // Check if this load/store has a hint to avoid pair formation.
// MachineMemOperands hints are set by the AArch64StorePairSuppress pass. // MachineMemOperands hints are set by the AArch64StorePairSuppress pass.
if (TII->isLdStPairSuppressed(MI)) if (TII->isLdStPairSuppressed(MI))