forked from OSchip/llvm-project
[AArch64] Bail even earlier if the instructions modifieds the base register. NFC.
llvm-svn: 260274
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@ -1151,11 +1151,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
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if (IsNarrowStore && Reg != AArch64::WZR)
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return E;
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// Early exit if the first instruction modifies the base register.
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// e.g., ldr x0, [x0]
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if (FirstMI->modifiesRegister(BaseReg, TRI))
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return E;
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// Early exit if the offset is not possible to match. (6 bits of positive
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// range, plus allow an extra one in case we find a later insn that matches
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// with Offset-1)
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@ -1560,6 +1555,12 @@ bool AArch64LoadStoreOpt::isCandidateToMergeOrPair(MachineInstr *MI) {
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if (!getLdStOffsetOp(MI).isImm())
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return false;
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// Can't merge/pair if the instruction modifies the base register.
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// e.g., ldr x0, [x0]
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unsigned BaseReg = getLdStBaseOp(MI).getReg();
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if (MI->modifiesRegister(BaseReg, TRI))
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return false;
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// Check if this load/store has a hint to avoid pair formation.
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// MachineMemOperands hints are set by the AArch64StorePairSuppress pass.
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if (TII->isLdStPairSuppressed(MI))
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