forked from OSchip/llvm-project
[AArch64] Correctly deal with VPR stack parameter passing.
llvm-svn: 210067
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9aee050a0c
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@ -1711,7 +1711,9 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
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InVals.push_back(FrameIdxN);
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continue;
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} if (VA.isRegLoc()) {
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}
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if (VA.isRegLoc()) {
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// Arguments stored in registers.
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EVT RegVT = VA.getLocVT();
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@ -1772,25 +1774,30 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
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SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
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SDValue ArgValue;
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// For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
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ISD::LoadExtType ExtType = ISD::NON_EXTLOAD;
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MVT MemVT = VA.getValVT();
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switch (VA.getLocInfo()) {
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default:
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break;
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case CCValAssign::SExt:
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ExtType = ISD::SEXTLOAD;
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MemVT = VA.getLocVT();
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break;
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case CCValAssign::ZExt:
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ExtType = ISD::ZEXTLOAD;
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MemVT = VA.getLocVT();
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break;
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case CCValAssign::AExt:
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ExtType = ISD::EXTLOAD;
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MemVT = VA.getLocVT();
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break;
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}
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ArgValue = DAG.getExtLoad(ExtType, DL, VA.getValVT(), Chain, FIN,
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MachinePointerInfo::getFixedStack(FI),
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VA.getLocVT(),
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false, false, false, 0);
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MemVT, false, false, false, 0);
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InVals.push_back(ArgValue);
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}
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@ -101,3 +101,11 @@ define fp128 @test_fp128([8 x float] %arg0, fp128 %arg1) {
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; CHECK: ldr {{q[0-9]+}}, [sp]
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ret fp128 %arg1
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}
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; Check if VPR can be correctly pass by stack.
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define <2 x double> @test_vreg_stack([8 x <2 x double>], <2 x double> %varg_stack) {
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entry:
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; CHECK-LABEL: test_vreg_stack:
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; CHECK: ldr {{q[0-9]+}}, [sp]
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ret <2 x double> %varg_stack;
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}
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