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[MIRLangRef] Document MachineOperand comments 

Late follow-up of D74306 to document MachineOperand comments in
MIRLangRef.

Differential Revision: https://reviews.llvm.org/D96518
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Sjoerd Meijer 2021-02-11 16:44:10 +00:00
parent 6103ba4a7e
commit cc4dcd48b8
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llvm/docs/MIRLangRef.rst
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@ -791,6 +791,24 @@ For an int eq predicate ``ICMP_EQ``, the syntax is:
.. TODO: Describe the syntax of the register live out machine operands. .. TODO: Describe the syntax of the register live out machine operands.
.. TODO: Describe the syntax of the machine memory operands. .. TODO: Describe the syntax of the machine memory operands.
Comments
^^^^^^^^
Machine operands can have C/C++ style comments, which are annotations enclosed
between ``/*`` and ``*/`` to improve readability of e.g. immediate operands.
In the example below, ARM instructions EOR and BCC and immediate operands
``14`` and ``0`` have been annotated with their condition codes (CC)
definitions, i.e. the ``always`` and ``eq`` condition codes:
.. code-block:: text
dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14 /* CC::always */, $noreg
t2Bcc %bb.4, 0 /* CC:eq */, killed $cpsr
As these annotations are comments, they are ignored by the MI parser.
Comments can be added or customized by overriding InstrInfo's hook
``createMIROperandComment()``.
Debug-Info constructs Debug-Info constructs
--------------------- ---------------------