forked from OSchip/llvm-project
parent
73fc84761f
commit
cc4c71b4fb
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@ -5913,13 +5913,14 @@ breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
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// If MI kills this register, the false dependence is already broken.
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if (MI->killsRegister(Reg, TRI))
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return;
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if (X86::VR128RegClass.contains(Reg)) {
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// These instructions are all floating point domain, so xorps is the best
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// choice.
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bool HasAVX = Subtarget.hasAVX();
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unsigned Opc = HasAVX ? X86::VXORPSrr : X86::XORPSrr;
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unsigned Opc = Subtarget.hasAVX() ? X86::VXORPSrr : X86::XORPSrr;
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BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(Opc), Reg)
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.addReg(Reg, RegState::Undef).addReg(Reg, RegState::Undef);
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MI->addRegisterKilled(Reg, TRI, true);
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} else if (X86::VR256RegClass.contains(Reg)) {
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// Use vxorps to clear the full ymm register.
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// It wants to read and write the xmm sub-register.
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@ -5927,16 +5928,16 @@ breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
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BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(X86::VXORPSrr), XReg)
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.addReg(XReg, RegState::Undef).addReg(XReg, RegState::Undef)
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.addReg(Reg, RegState::ImplicitDefine);
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} else
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return;
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MI->addRegisterKilled(Reg, TRI, true);
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MI->addRegisterKilled(Reg, TRI, true);
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}
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}
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MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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// Check switch flag
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if (NoFusing) return nullptr;
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if (NoFusing)
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return nullptr;
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// Unless optimizing for size, don't fold to avoid partial
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// register update stalls
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