Change the representation of MCCFIInstruction.

We now store the Register and Offset directly. MachineLocation is gone (from
this file)!

llvm-svn: 168536
This commit is contained in:
Rafael Espindola 2012-11-24 04:33:48 +00:00
parent 6c92b89a9c
commit cc0c74a76c
2 changed files with 47 additions and 62 deletions

View File

@ -16,7 +16,6 @@
#define LLVM_MC_MCDWARF_H #define LLVM_MC_MCDWARF_H
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include "llvm/MC/MachineLocation.h"
#include "llvm/Support/raw_ostream.h" #include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Dwarf.h" #include "llvm/Support/Dwarf.h"
#include "llvm/Support/Compiler.h" #include "llvm/Support/Compiler.h"
@ -272,108 +271,102 @@ namespace llvm {
private: private:
OpType Operation; OpType Operation;
MCSymbol *Label; MCSymbol *Label;
// Move to & from location. unsigned Register;
MachineLocation Destination; int Offset;
MachineLocation Source;
std::vector<char> Values; std::vector<char> Values;
MCCFIInstruction(OpType Op, MCSymbol *L, const MachineLocation &D,
const MachineLocation &S, StringRef V) : MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R,
Operation(Op), Label(L), Destination(D), Source(S), int O, StringRef V) :
Operation(Op), Label(L), Register(R), Offset(O),
Values(V.begin(), V.end()) { Values(V.begin(), V.end()) {
} }
public: public:
static MCCFIInstruction static MCCFIInstruction
createOffset(MCSymbol *L, unsigned Register, int Offset) { createOffset(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(Register, Offset); MCCFIInstruction Ret(OpOffset, L, Register, Offset, "");
MachineLocation Source(Register, Offset);
MCCFIInstruction Ret(OpOffset, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction static MCCFIInstruction
createDefCfaRegister(MCSymbol *L, unsigned Register) { createDefCfaRegister(MCSymbol *L, unsigned Register) {
MachineLocation Dest(Register); MCCFIInstruction Ret(OpDefCfaRegister, L, Register, 0, "");
MachineLocation Source(MachineLocation::VirtualFP);
MCCFIInstruction Ret(OpDefCfaRegister, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) { static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) {
MachineLocation Dest(MachineLocation::VirtualFP); MCCFIInstruction Ret(OpDefCfaOffset, L, 0, -Offset, "");
MachineLocation Source(MachineLocation::VirtualFP, -Offset);
MCCFIInstruction Ret(OpDefCfaOffset, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction static MCCFIInstruction
createDefCfa(MCSymbol *L, unsigned Register, int Offset) { createDefCfa(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(MachineLocation::VirtualFP); MCCFIInstruction Ret(OpDefCfa, L, Register, -Offset, "");
MachineLocation Source(Register, -Offset);
MCCFIInstruction Ret(OpDefCfa, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) { static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) {
MachineLocation Dummy; MCCFIInstruction Ret(OpUndefined, L, Register, 0, "");
MachineLocation Dest(Register);
MCCFIInstruction Ret(OpUndefined, L, Dest, Dummy, "");
return Ret; return Ret;
} }
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) { static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) {
MachineLocation Dummy; MCCFIInstruction Ret(OpRestore, L, Register, 0, "");
MachineLocation Dest(Register);
MCCFIInstruction Ret(OpRestore, L, Dest, Dummy, "");
return Ret; return Ret;
} }
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) { static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) {
MachineLocation Dummy; MCCFIInstruction Ret(OpSameValue, L, Register, 0, "");
MachineLocation Dest(Register);
MCCFIInstruction Ret(OpSameValue, L, Dest, Dummy, "");
return Ret; return Ret;
} }
static MCCFIInstruction createRestoreState(MCSymbol *L) { static MCCFIInstruction createRestoreState(MCSymbol *L) {
MachineLocation Dummy; MCCFIInstruction Ret(OpRestoreState, L, 0, 0, "");
MCCFIInstruction Ret(OpRestoreState, L, Dummy, Dummy, "");
return Ret; return Ret;
} }
static MCCFIInstruction createRememberState(MCSymbol *L) { static MCCFIInstruction createRememberState(MCSymbol *L) {
MachineLocation Dummy; MCCFIInstruction Ret(OpRememberState, L, 0, 0, "");
MCCFIInstruction Ret(OpRememberState, L, Dummy, Dummy, "");
return Ret; return Ret;
} }
static MCCFIInstruction static MCCFIInstruction
createRelOffset(MCSymbol *L, unsigned Register, int Offset) { createRelOffset(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(Register, Offset); MCCFIInstruction Ret(OpRelOffset, L, Register, Offset, "");
MachineLocation Source(Register, Offset);
MCCFIInstruction Ret(OpRelOffset, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction static MCCFIInstruction
createAdjustCfaOffset(MCSymbol *L, int Adjustment) { createAdjustCfaOffset(MCSymbol *L, int Adjustment) {
MachineLocation Dest(MachineLocation::VirtualFP); MCCFIInstruction Ret(OpAdjustCfaOffset, L, 0, Adjustment, "");
MachineLocation Source(MachineLocation::VirtualFP, Adjustment);
MCCFIInstruction Ret(OpAdjustCfaOffset, L, Dest, Source, "");
return Ret; return Ret;
} }
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) { static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) {
MachineLocation Dummy; MCCFIInstruction Ret(OpEscape, L, 0, 0, Vals);
MCCFIInstruction Ret(OpEscape, L, Dummy, Dummy, Vals);
return Ret; return Ret;
} }
OpType getOperation() const { return Operation; } OpType getOperation() const { return Operation; }
MCSymbol *getLabel() const { return Label; } MCSymbol *getLabel() const { return Label; }
const MachineLocation &getDestination() const { return Destination; }
const MachineLocation &getSource() const { return Source; } unsigned getRegister() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRestore || Operation == OpUndefined ||
Operation == OpSameValue || Operation == OpDefCfaRegister ||
Operation == OpRelOffset);
return Register;
}
int getOffset() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRelOffset || Operation == OpDefCfaOffset ||
Operation == OpAdjustCfaOffset);
return Offset;
}
const StringRef getValues() const { const StringRef getValues() const {
assert(Operation == OpEscape);
return StringRef(&Values[0], Values.size()); return StringRef(&Values[0], Values.size());
} }
}; };

View File

@ -939,7 +939,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
switch (Instr.getOperation()) { switch (Instr.getOperation()) {
case MCCFIInstruction::OpUndefined: { case MCCFIInstruction::OpUndefined: {
unsigned Reg = Instr.getDestination().getReg(); unsigned Reg = Instr.getRegister();
if (VerboseAsm) { if (VerboseAsm) {
Streamer.AddComment("DW_CFA_undefined"); Streamer.AddComment("DW_CFA_undefined");
Streamer.AddComment(Twine("Reg ") + Twine(Reg)); Streamer.AddComment(Twine("Reg ") + Twine(Reg));
@ -950,7 +950,6 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
} }
case MCCFIInstruction::OpAdjustCfaOffset: case MCCFIInstruction::OpAdjustCfaOffset:
case MCCFIInstruction::OpDefCfaOffset: { case MCCFIInstruction::OpDefCfaOffset: {
const MachineLocation &Src = Instr.getSource();
const bool IsRelative = const bool IsRelative =
Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset; Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset;
@ -959,9 +958,9 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1); Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1);
if (IsRelative) if (IsRelative)
CFAOffset += Src.getOffset(); CFAOffset += Instr.getOffset();
else else
CFAOffset = -Src.getOffset(); CFAOffset = -Instr.getOffset();
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment(Twine("Offset " + Twine(CFAOffset))); Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
@ -970,17 +969,15 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
return; return;
} }
case MCCFIInstruction::OpDefCfa: { case MCCFIInstruction::OpDefCfa: {
const MachineLocation &Src = Instr.getSource();
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment("DW_CFA_def_cfa"); Streamer.AddComment("DW_CFA_def_cfa");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1); Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1);
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment(Twine("Reg ") + Twine(Src.getReg())); Streamer.AddComment(Twine("Reg ") + Twine(Instr.getRegister()));
Streamer.EmitULEB128IntValue(Src.getReg()); Streamer.EmitULEB128IntValue(Instr.getRegister());
CFAOffset = -Src.getOffset(); CFAOffset = -Instr.getOffset();
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment(Twine("Offset " + Twine(CFAOffset))); Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
@ -990,29 +987,24 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
} }
case MCCFIInstruction::OpDefCfaRegister: { case MCCFIInstruction::OpDefCfaRegister: {
const MachineLocation &Dst = Instr.getDestination();
assert(Dst.isReg() && "Machine move not supported yet.");
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment("DW_CFA_def_cfa_register"); Streamer.AddComment("DW_CFA_def_cfa_register");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1); Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1);
if (VerboseAsm) if (VerboseAsm)
Streamer.AddComment(Twine("Reg ") + Twine(Dst.getReg())); Streamer.AddComment(Twine("Reg ") + Twine(Instr.getRegister()));
Streamer.EmitULEB128IntValue(Dst.getReg()); Streamer.EmitULEB128IntValue(Instr.getRegister());
return; return;
} }
case MCCFIInstruction::OpOffset: case MCCFIInstruction::OpOffset:
case MCCFIInstruction::OpRelOffset: { case MCCFIInstruction::OpRelOffset: {
const MachineLocation &Dst = Instr.getDestination();
const MachineLocation &Src = Instr.getSource();
const bool IsRelative = const bool IsRelative =
Instr.getOperation() == MCCFIInstruction::OpRelOffset; Instr.getOperation() == MCCFIInstruction::OpRelOffset;
unsigned Reg = Src.getReg(); unsigned Reg = Instr.getRegister();
int Offset = Dst.getOffset(); int Offset = Instr.getOffset();
if (IsRelative) if (IsRelative)
Offset -= CFAOffset; Offset -= CFAOffset;
Offset = Offset / dataAlignmentFactor; Offset = Offset / dataAlignmentFactor;
@ -1049,7 +1041,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
Streamer.EmitIntValue(dwarf::DW_CFA_restore_state, 1); Streamer.EmitIntValue(dwarf::DW_CFA_restore_state, 1);
return; return;
case MCCFIInstruction::OpSameValue: { case MCCFIInstruction::OpSameValue: {
unsigned Reg = Instr.getDestination().getReg(); unsigned Reg = Instr.getRegister();
if (VerboseAsm) Streamer.AddComment("DW_CFA_same_value"); if (VerboseAsm) Streamer.AddComment("DW_CFA_same_value");
Streamer.EmitIntValue(dwarf::DW_CFA_same_value, 1); Streamer.EmitIntValue(dwarf::DW_CFA_same_value, 1);
if (VerboseAsm) Streamer.AddComment(Twine("Reg ") + Twine(Reg)); if (VerboseAsm) Streamer.AddComment(Twine("Reg ") + Twine(Reg));
@ -1057,7 +1049,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
return; return;
} }
case MCCFIInstruction::OpRestore: { case MCCFIInstruction::OpRestore: {
unsigned Reg = Instr.getDestination().getReg(); unsigned Reg = Instr.getRegister();
if (VerboseAsm) { if (VerboseAsm) {
Streamer.AddComment("DW_CFA_restore"); Streamer.AddComment("DW_CFA_restore");
Streamer.AddComment(Twine("Reg ") + Twine(Reg)); Streamer.AddComment(Twine("Reg ") + Twine(Reg));