forked from OSchip/llvm-project
parent
bfa5319eb2
commit
cbedb8b400
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@ -7,6 +7,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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@ -46,14 +47,14 @@ namespace {
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/// runOnMachineFunction - Register allocate the whole function
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bool runOnMachineFunction(MachineFunction &Fn);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// AllocateBasicBlock - Register allocate the specified basic block.
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void AllocateBasicBlock(MachineBasicBlock &MBB);
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
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/// in predecessor basic blocks.
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void EliminatePHINodes(MachineBasicBlock &MBB);
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/// getStackSpaceFor - This returns the offset of the specified virtual
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/// register on the stack, allocating space if neccesary.
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int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
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@ -88,8 +89,7 @@ int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
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return I->second; // Already has space allocated?
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// Allocate a new stack object for this spill location...
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int FrameIdx =
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MF->getFrameInfo()->CreateStackObject(RC->getSize(), RC->getAlignment());
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int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
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// Assign the slot...
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StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
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@ -137,74 +137,6 @@ void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
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}
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
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/// predecessor basic blocks.
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///
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void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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const MachineInstrInfo &MII = TM->getInstrInfo();
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while (MBB.front()->getOpcode() == MachineInstrInfo::PHI) {
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MachineInstr *MI = MBB.front();
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// Unlink the PHI node from the basic block... but don't delete the PHI yet
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MBB.erase(MBB.begin());
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DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
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assert(MI->getOperand(0).isVirtualRegister() &&
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"PHI node doesn't write virt reg?");
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unsigned virtualReg = MI->getOperand(0).getAllocatedRegNum();
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for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
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MachineOperand &opVal = MI->getOperand(i-1);
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// Get the MachineBasicBlock equivalent of the BasicBlock that is the
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// source path the phi
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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// Check to make sure we haven't already emitted the copy for this block.
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// This can happen because PHI nodes may have multiple entries for the
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// same basic block. It doesn't matter which entry we use though, because
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// all incoming values are guaranteed to be the same for a particular bb.
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//
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// Note that this is N^2 in the number of phi node entries, but since the
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// # of entries is tiny, this is not a problem.
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//
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bool HaveNotEmitted = true;
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for (int op = MI->getNumOperands() - 1; op != i; op -= 2)
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if (&opBlock == MI->getOperand(op).getMachineBasicBlock()) {
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HaveNotEmitted = false;
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break;
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}
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if (HaveNotEmitted) {
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MachineBasicBlock::iterator opI = opBlock.end();
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MachineInstr *opMI = *--opI;
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// must backtrack over ALL the branches in the previous block
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while (MII.isBranch(opMI->getOpcode()) && opI != opBlock.begin())
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opMI = *--opI;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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//
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if (!MII.isBranch(opMI->getOpcode()))
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++opI;
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const TargetRegisterClass *RC =
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MF->getSSARegMap()->getRegClass(virtualReg);
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assert(opVal.isVirtualRegister() &&
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"Machine PHI Operands must all be virtual registers!");
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RegInfo->copyRegToReg(opBlock, opI, virtualReg, opVal.getReg(), RC);
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}
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}
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// really delete the PHI instruction now!
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delete MI;
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}
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}
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void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// loop over each instruction
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
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@ -281,12 +213,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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TM = &MF->getTarget();
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RegInfo = TM->getRegisterInfo();
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// First pass: eliminate PHI instructions by inserting copies into predecessor
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// blocks.
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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EliminatePHINodes(*MBB);
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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