forked from OSchip/llvm-project
[GlobalISel] Fix assert failure when legalizing non-power-2 loads.
Until we support extending loads properly we're going to fall back for these. We already handle stores in the same way, so this is just being consistent. llvm-svn: 324001
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@ -709,9 +709,12 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
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return Legalized;
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}
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case TargetOpcode::G_LOAD: {
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assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
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WideTy.getSizeInBits() &&
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"illegal to increase number of bytes loaded");
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// For some types like i24, we might try to widen to i32. To properly handle
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// this we should be using a dedicated extending load, until then avoid
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// trying to legalize.
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if (alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) !=
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WideTy.getSizeInBits())
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return UnableToLegalize;
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unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
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MIRBuilder.buildLoad(DstExt, MI.getOperand(1).getReg(),
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@ -65,6 +65,16 @@ false:
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}
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %0:_(s24) = G_LOAD %1:_(p0); mem:LD3[undef](align=1) (in function: odd_type_load)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type_load
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; FALLBACK-WITH-REPORT-OUT-LABEL: odd_type_load
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define i32 @odd_type_load() {
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entry:
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%ld = load i24, i24* undef, align 1
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%cst = zext i24 %ld to i32
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ret i32 %cst
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}
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; General legalizer inability to handle types whose size wasn't a power of 2.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %1:_(s42), %0:_(p0); mem:ST6[%addr](align=8) (in function: odd_type)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type
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