MIR Serialization: Serialize the 'dead' register machine operand flag.

llvm-svn: 241624

llvm/lib/CodeGen/MIRParser/MILexer.cpp

@@ -70,6 +70,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
       .Case("_", MIToken::underscore)
       .Case("implicit", MIToken::kw_implicit)
       .Case("implicit-def", MIToken::kw_implicit_define)
+      .Case("dead", MIToken::kw_dead)
       .Default(MIToken::Identifier);
 }
 

llvm/lib/CodeGen/MIRParser/MILexer.h

@@ -39,6 +39,7 @@ struct MIToken {
     // Keywords
     kw_implicit,
     kw_implicit_define,
+    kw_dead,
 
     // Identifier tokens
     Identifier,
@@ -74,7 +75,7 @@ public:
   }
 
   bool isRegisterFlag() const {
-    return Kind == kw_implicit || Kind == kw_implicit_define;
+    return Kind == kw_implicit || Kind == kw_implicit_define || Kind == kw_dead;
   }
 
   bool is(TokenKind K) const { return Kind == K; }

llvm/lib/CodeGen/MIRParser/MIParser.cpp

@@ -305,6 +305,9 @@ bool MIParser::parseRegisterFlag(unsigned &Flags) {
   case MIToken::kw_implicit_define:
     Flags |= RegState::ImplicitDefine;
     break;
+  case MIToken::kw_dead:
+    Flags |= RegState::Dead;
+    break;
   // TODO: report an error when we specify the same flag more than once.
   // TODO: parse the other register flags.
   default:
@@ -328,7 +331,8 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
   lex();
   // TODO: Parse subregister.
   Dest = MachineOperand::CreateReg(Reg, Flags & RegState::Define,
-                                   Flags & RegState::Implicit);
+                                   Flags & RegState::Implicit, /*IsKill=*/false,
+                                   Flags & RegState::Dead);
   return false;
 }
 
@@ -412,6 +416,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest) {
   switch (Token.kind()) {
   case MIToken::kw_implicit:
   case MIToken::kw_implicit_define:
+  case MIToken::kw_dead:
   case MIToken::underscore:
   case MIToken::NamedRegister:
     return parseRegisterOperand(Dest);

llvm/lib/CodeGen/MIRPrinter.cpp

@@ -214,6 +214,8 @@ void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
     // TODO: Print the other register flags.
     if (Op.isImplicit())
       OS << (Op.isDef() ? "implicit-def " : "implicit ");
+    if (Op.isDead())
+      OS << "dead ";
     printReg(Op.getReg(), OS, TRI);
     // TODO: Print sub register.
     break;

llvm/test/CodeGen/MIR/X86/dead-register-flag.mir

@@ -0,0 +1,26 @@
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses the 'dead' register flags
+# correctly.
+
+--- |
+
+  define i32 @foo(i32 %a) #0 {
+  body:
+    %c = mul i32 %a, 11
+    ret i32 %c
+  }
+
+  attributes #0 = { "no-frame-pointer-elim"="false" }
+
+...
+---
+name:            foo
+body:
+  # CHECK: name: body
+  - id:          0
+    name:        body
+    instructions:
+      # CHECK: - '%eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags'
+      - '%eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags'
+      - 'RETQ %eax'
+...