forked from OSchip/llvm-project
[Test] Add one more test with corner cases for non-wrapping IVs
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Max Kazantsev
parent
d5e0868e5e
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cb2bc9aad5
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -mtriple=x86_64-linux -codegenprepare -S | FileCheck %s
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; No overflow flags, same type width.
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define i32 @test_01(i32* %p, i64 %len, i32 %x) {
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; CHECK-LABEL: @test_01(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i64 [[IV]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[COND_1]], label [[EXIT:%.*]], label [[BACKEDGE]]
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; CHECK: backedge:
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; CHECK-NEXT: [[SUNKADDR:%.*]] = mul i64 [[IV]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[P:%.*]] to i8*
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; CHECK-NEXT: [[SUNKADDR1:%.*]] = getelementptr i8, i8* [[TMP0]], i64 [[SUNKADDR]]
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; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr i8, i8* [[SUNKADDR1]], i64 -4
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[SUNKADDR2]] to i32*
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; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, i32* [[TMP1]] unordered, align 4
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; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[LOADED]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: unreachable
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;
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entry:
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%scevgep = getelementptr i32, i32* %p, i64 -1
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br label %loop
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loop: ; preds = %backedge, %entry
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%iv = phi i64 [ %iv.next, %backedge ], [ 0, %entry ]
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%iv.next = add i64 %iv, 1
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%cond_1 = icmp eq i64 %iv, %len
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br i1 %cond_1, label %exit, label %backedge
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backedge: ; preds = %loop
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%scevgep1 = getelementptr i32, i32* %scevgep, i64 %iv
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%loaded = load atomic i32, i32* %scevgep1 unordered, align 4
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%cond_2 = icmp eq i32 %loaded, %x
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br i1 %cond_2, label %failure, label %loop
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exit: ; preds = %loop
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ret i32 -1
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failure: ; preds = %backedge
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unreachable
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}
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; nsw flag, same type width.
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define i32 @test_02(i32* %p, i64 %len, i32 %x) {
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; CHECK-LABEL: @test_02(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1
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; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i64 [[IV]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[COND_1]], label [[EXIT:%.*]], label [[BACKEDGE]]
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; CHECK: backedge:
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; CHECK-NEXT: [[SUNKADDR:%.*]] = mul i64 [[IV]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[P:%.*]] to i8*
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; CHECK-NEXT: [[SUNKADDR1:%.*]] = getelementptr i8, i8* [[TMP0]], i64 [[SUNKADDR]]
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; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr i8, i8* [[SUNKADDR1]], i64 -4
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[SUNKADDR2]] to i32*
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; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, i32* [[TMP1]] unordered, align 4
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; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[LOADED]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: unreachable
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;
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entry:
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%scevgep = getelementptr i32, i32* %p, i64 -1
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br label %loop
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loop: ; preds = %backedge, %entry
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%iv = phi i64 [ %iv.next, %backedge ], [ 0, %entry ]
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%iv.next = add nsw i64 %iv, 1
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%cond_1 = icmp eq i64 %iv, %len
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br i1 %cond_1, label %exit, label %backedge
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backedge: ; preds = %loop
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%scevgep1 = getelementptr i32, i32* %scevgep, i64 %iv
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%loaded = load atomic i32, i32* %scevgep1 unordered, align 4
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%cond_2 = icmp eq i32 %loaded, %x
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br i1 %cond_2, label %failure, label %loop
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exit: ; preds = %loop
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ret i32 -1
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failure: ; preds = %backedge
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unreachable
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}
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; nuw flag, same type width.
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define i32 @test_03(i32* %p, i64 %len, i32 %x) {
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; CHECK-LABEL: @test_03(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
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; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i64 [[IV]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[COND_1]], label [[EXIT:%.*]], label [[BACKEDGE]]
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; CHECK: backedge:
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; CHECK-NEXT: [[SUNKADDR:%.*]] = mul i64 [[IV]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[P:%.*]] to i8*
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; CHECK-NEXT: [[SUNKADDR1:%.*]] = getelementptr i8, i8* [[TMP0]], i64 [[SUNKADDR]]
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; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr i8, i8* [[SUNKADDR1]], i64 -4
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[SUNKADDR2]] to i32*
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; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, i32* [[TMP1]] unordered, align 4
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; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[LOADED]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: unreachable
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;
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entry:
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%scevgep = getelementptr i32, i32* %p, i64 -1
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br label %loop
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loop: ; preds = %backedge, %entry
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%iv = phi i64 [ %iv.next, %backedge ], [ 0, %entry ]
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%iv.next = add nuw i64 %iv, 1
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%cond_1 = icmp eq i64 %iv, %len
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br i1 %cond_1, label %exit, label %backedge
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backedge: ; preds = %loop
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%scevgep1 = getelementptr i32, i32* %scevgep, i64 %iv
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%loaded = load atomic i32, i32* %scevgep1 unordered, align 4
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%cond_2 = icmp eq i32 %loaded, %x
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br i1 %cond_2, label %failure, label %loop
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exit: ; preds = %loop
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ret i32 -1
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failure: ; preds = %backedge
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unreachable
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}
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